Searched refs:PLL1_CFG (Results 1 – 1 of 1) sorted by relevance
| /external/u-boot/arch/arm/mach-sunxi/ |
| D | clock_sun4i.c | 81 #define PLL1_CFG(N, K, M, P) ( 1 << CCM_PLL1_CFG_ENABLE_SHIFT | \ macro
99 { PLL1_CFG(31, 1, 0, 0), 1488000000},
100 { PLL1_CFG(30, 1, 0, 0), 1440000000},
101 { PLL1_CFG(29, 1, 0, 0), 1392000000},
102 { PLL1_CFG(28, 1, 0, 0), 1344000000},
103 { PLL1_CFG(27, 1, 0, 0), 1296000000},
104 { PLL1_CFG(26, 1, 0, 0), 1248000000},
105 { PLL1_CFG(25, 1, 0, 0), 1200000000},
106 { PLL1_CFG(24, 1, 0, 0), 1152000000},
107 { PLL1_CFG(23, 1, 0, 0), 1104000000},
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