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Searched refs:PLL1_CLOCK (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx5/
Dclock.c19 PLL1_CLOCK = 0, enumerator
29 [PLL1_CLOCK] = (struct mxc_pll_reg *)PLL1_BASE_ADDR,
257 freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_mcu_main_clk()
274 return decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_periph_clk()
328 freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_standard_pll_sel_clk()
456 ret_val = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_ddr_clk()
651 case PLL1_CLOCK: in config_pll_clk()
719 return config_pll_clk(PLL1_CLOCK, &pll_param); in config_core_clk()
781 return config_pll_clk(PLL1_CLOCK, &pll_param); in config_periph_clk()
921 freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in do_mx5_showclocks()