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Searched refs:PLL_BYPASS_MASK (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/mach-tegra/
Dcpu.c187 reg = PLL_BYPASS_MASK | (divm << pllinfo->m_shift); in pllx_set_rate()
208 reg &= ~PLL_BYPASS_MASK; in pllx_set_rate()
Dclock.c622 base_reg |= PLL_BYPASS_MASK; in clock_set_rate()
636 base_reg &= ~PLL_BYPASS_MASK; in clock_set_rate()
/external/u-boot/arch/arm/mach-davinci/
Dlowlevel_init.S115 ldr r7, PLL_BYPASS_MASK
389 ldr r7, PLL_BYPASS_MASK
648 PLL_BYPASS_MASK: label
/external/u-boot/arch/arm/include/asm/arch-tegra/
Dclk_rst.h241 #define PLL_BYPASS_MASK (1U << PLL_BYPASS_SHIFT) macro