| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 67 PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) in PPCTargetLowering() function in PPCTargetLowering
416 unsigned PPCTargetLowering::getByValTypeAlignment(Type *Ty) const { in getByValTypeAlignment()
425 const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const { in getTargetNodeName()
473 EVT PPCTargetLowering::getSetCCResultType(EVT VT) const { in getSetCCResultType()
802 bool PPCTargetLowering::SelectAddressRegReg(SDValue N, SDValue &Base, in SelectAddressRegReg()
850 bool PPCTargetLowering::SelectAddressRegImm(SDValue N, SDValue &Disp, in SelectAddressRegImm()
938 bool PPCTargetLowering::SelectAddressRegRegOnly(SDValue N, SDValue &Base, in SelectAddressRegRegOnly()
966 bool PPCTargetLowering::SelectAddressRegImmShift(SDValue N, SDValue &Disp, in SelectAddressRegImmShift()
1055 bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base, in getPreIndexedAddressParts()
1158 SDValue PPCTargetLowering::LowerConstantPool(SDValue Op, in LowerConstantPool()
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| D | PPCTargetMachine.h | 38 PPCTargetLowering TLInfo;
52 virtual const PPCTargetLowering *getTargetLowering() const { in getTargetLowering()
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| D | PPCISelLowering.h | 236 class PPCTargetLowering : public TargetLowering {
240 explicit PPCTargetLowering(PPCTargetMachine &TM);
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| D | PPCISelDAGToDAG.cpp | 43 const PPCTargetLowering &PPCLowering;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 125 PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, in PPCTargetLowering() function in PPCTargetLowering
1212 unsigned PPCTargetLowering::getByValTypeAlignment(Type *Ty, in getByValTypeAlignment()
1226 unsigned PPCTargetLowering::getNumRegistersForCallingConv(LLVMContext &Context, in getNumRegistersForCallingConv()
1231 return PPCTargetLowering::getNumRegisters(Context, VT); in getNumRegistersForCallingConv()
1234 MVT PPCTargetLowering::getRegisterTypeForCallingConv(LLVMContext &Context, in getRegisterTypeForCallingConv()
1239 return PPCTargetLowering::getRegisterType(Context, VT); in getRegisterTypeForCallingConv()
1242 bool PPCTargetLowering::useSoftFloat() const { in useSoftFloat()
1246 bool PPCTargetLowering::hasSPE() const { in hasSPE()
1250 const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const { in getTargetNodeName()
1362 EVT PPCTargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &C, in getSetCCResultType()
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| D | PPCTargetTransformInfo.h | 34 const PPCTargetLowering *TLI;
37 const PPCTargetLowering *getTLI() const { return TLI; } in getTLI()
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| D | PPCSubtarget.h | 150 PPCTargetLowering TLInfo;
183 const PPCTargetLowering *getTargetLowering() const override { in getTargetLowering()
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| D | PPCISelLowering.h | 549 class PPCTargetLowering : public TargetLowering {
553 explicit PPCTargetLowering(const PPCTargetMachine &TM,
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| D | PPCCTRLoops.cpp | 124 const PPCTargetLowering *TLI;
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| D | README_ALTIVEC.txt | 304 is used in PPCISelLowering.cpp, PPCTargetLowering::LOWERVECTOR_SHUFFLE().
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| D | PPCISelDAGToDAG.cpp | 141 const PPCTargetLowering *PPCLowering;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.h | 34 const PPCTargetLowering *TLI;
37 const PPCTargetLowering *getTLI() const { return TLI; } in getTLI()
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| D | PPCISelLowering.cpp | 69 PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, in PPCTargetLowering() function in PPCTargetLowering
988 unsigned PPCTargetLowering::getByValTypeAlignment(Type *Ty, in getByValTypeAlignment()
1002 bool PPCTargetLowering::useSoftFloat() const { in useSoftFloat()
1006 const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const { in getTargetNodeName()
1103 EVT PPCTargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &C, in getSetCCResultType()
1114 bool PPCTargetLowering::enableAggressiveFMAFusion(EVT VT) const { in enableAggressiveFMAFusion()
1761 bool PPCTargetLowering::SelectAddressRegReg(SDValue N, SDValue &Base, in SelectAddressRegReg()
1846 bool PPCTargetLowering::SelectAddressRegImm(SDValue N, SDValue &Disp, in SelectAddressRegImm()
1945 bool PPCTargetLowering::SelectAddressRegRegOnly(SDValue N, SDValue &Base, in SelectAddressRegRegOnly()
1973 bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base, in getPreIndexedAddressParts()
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| D | PPCSubtarget.h | 146 PPCTargetLowering TLInfo;
179 const PPCTargetLowering *getTargetLowering() const override { in getTargetLowering()
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| D | PPCISelLowering.h | 456 class PPCTargetLowering : public TargetLowering {
460 explicit PPCTargetLowering(const PPCTargetMachine &TM,
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| D | README_ALTIVEC.txt | 304 is used in PPCISelLowering.cpp, PPCTargetLowering::LOWERVECTOR_SHUFFLE().
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| D | PPCISelDAGToDAG.cpp | 70 const PPCTargetLowering *PPCLowering;
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | zext-bitperm.ll | 5 ; Test case for PPCTargetLowering::extendSubTreeForBitPermutation.
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