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Searched refs:PTR4_TDINIT3 (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/mach-sunxi/dram_timings/
Dlpddr3_stock.c79 writel(PTR4_TDINIT2(tdinit2) | PTR4_TDINIT3(tdinit3), &mctl_ctl->ptr[4]); in mctl_set_timing_params()
Dddr2_v3s.c80 writel(PTR4_TDINIT2(tdinit2) | PTR4_TDINIT3(tdinit3), &mctl_ctl->ptr[4]); in mctl_set_timing_params()
Dddr3_1333.c83 writel(PTR4_TDINIT2(tdinit2) | PTR4_TDINIT3(tdinit3), &mctl_ctl->ptr[4]); in mctl_set_timing_params()
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Ddram_sunxi_dw.h151 #define PTR4_TDINIT3(x) ((x) << 20) macro