Searched refs:PWR_PLL_CTRL (Results 1 – 2 of 2) sorted by relevance
/external/u-boot/drivers/phy/marvell/ |
D | comphy_a3700.c | 213 reg_set16(phy_addr(PCIE, PWR_PLL_CTRL), 0xFC63, 0xFFFF); in comphy_pcie_power_up() 216 reg_set16(phy_addr(PCIE, PWR_PLL_CTRL), 0xFC62, 0xFFFF); in comphy_pcie_power_up() 426 usb3_reg_set16(PWR_PLL_CTRL, 0xFCA3, 0xFFFF, lane); in comphy_usb3_power_up() 430 usb3_reg_set16(PWR_PLL_CTRL, 0xFCA2, 0xFFFF, lane); in comphy_usb3_power_up() 753 reg_set16(sgmiiphy_addr(lane, PWR_PLL_CTRL), in comphy_sgmii_power_up() 767 reg_set16(sgmiiphy_addr(lane, PWR_PLL_CTRL), in comphy_sgmii_power_up() 771 reg_set16(sgmiiphy_addr(lane, PWR_PLL_CTRL), in comphy_sgmii_power_up()
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D | comphy_a3700.h | 91 #define PWR_PLL_CTRL 0x01 macro
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