Searched refs:PrivateSegmentWaveByteOffsetReg (Results 1 – 2 of 2) sorted by relevance
846 unsigned PrivateSegmentWaveByteOffsetReg; in LowerFormalArguments() local849 PrivateSegmentWaveByteOffsetReg = findFirstFreeSGPR(CCInfo); in LowerFormalArguments()850 Info->setPrivateSegmentWaveByteOffset(PrivateSegmentWaveByteOffsetReg); in LowerFormalArguments()852 PrivateSegmentWaveByteOffsetReg = Info->addPrivateSegmentWaveByteOffset(); in LowerFormalArguments()854 MF.addLiveIn(PrivateSegmentWaveByteOffsetReg, &AMDGPU::SGPR_32RegClass); in LowerFormalArguments()855 CCInfo.AllocateReg(PrivateSegmentWaveByteOffsetReg); in LowerFormalArguments()877 unsigned PrivateSegmentWaveByteOffsetReg = TRI->getPreloadedValue( in LowerFormalArguments() local879 Info->setScratchWaveOffsetReg(PrivateSegmentWaveByteOffsetReg); in LowerFormalArguments()
1601 unsigned PrivateSegmentWaveByteOffsetReg; in allocateSystemSGPRs() local1604 PrivateSegmentWaveByteOffsetReg = in allocateSystemSGPRs()1609 if (PrivateSegmentWaveByteOffsetReg == AMDGPU::NoRegister) { in allocateSystemSGPRs()1610 PrivateSegmentWaveByteOffsetReg = findFirstFreeSGPR(CCInfo); in allocateSystemSGPRs()1611 Info.setPrivateSegmentWaveByteOffset(PrivateSegmentWaveByteOffsetReg); in allocateSystemSGPRs()1614 PrivateSegmentWaveByteOffsetReg = Info.addPrivateSegmentWaveByteOffset(); in allocateSystemSGPRs()1616 MF.addLiveIn(PrivateSegmentWaveByteOffsetReg, &AMDGPU::SGPR_32RegClass); in allocateSystemSGPRs()1617 CCInfo.AllocateReg(PrivateSegmentWaveByteOffsetReg); in allocateSystemSGPRs()1668 unsigned PrivateSegmentWaveByteOffsetReg = Info.getPreloadedReg( in reservePrivateMemoryRegs() local1670 Info.setScratchWaveOffsetReg(PrivateSegmentWaveByteOffsetReg); in reservePrivateMemoryRegs()