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Searched refs:QIXIS_PWR_CTL2_PCTL (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/board/freescale/common/
Darm_sleep.c82 tmp &= ~QIXIS_PWR_CTL2_PCTL; in ls1_psci_resume_fixup()
/external/u-boot/arch/arm/cpu/armv7/ls102xa/
Dls102xa_psci.c182 tmp |= QIXIS_PWR_CTL2_PCTL; in ls1_deep_sleep()
/external/u-boot/include/configs/
Dls1021aqds.h238 #define QIXIS_PWR_CTL2_PCTL 0x2 macro