Searched refs:R8A77970_CLK_Z2 (Results 1 – 3 of 3) sorted by relevance
16 #define R8A77970_CLK_Z2 0 macro
75 DEF_BASE("z2", R8A77970_CLK_Z2, CLK_TYPE_GEN3_Z2, CLK_PLL1_DIV4),
35 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;