Searched refs:RCC_PLLNCFGR1_DIVM_MASK (Results 1 – 1 of 1) sorted by relevance
171 #define RCC_PLLNCFGR1_DIVM_MASK GENMASK(21, 16) macro834 divm = (cfgr1 & (RCC_PLLNCFGR1_DIVM_MASK)) >> RCC_PLLNCFGR1_DIVM_SHIFT; in stm32mp1_read_pll_freq()1340 & RCC_PLLNCFGR1_DIVM_MASK; in pll_config()