Searched refs:RCP_A_E (Results 1 – 5 of 5) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | udivrem.ll | 37 ; SI-DAG: v_add_{{[iu]}}32_e32 [[RCP_A_E:v[0-9]+]], vcc, [[E]], [[RCP]]
39 ; SI: v_cndmask_b32_e64 [[CND2:v[0-9]+]], [[RCP_S_E]], [[RCP_A_E]], [[CC1]]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCodeGenPrepare.cpp | 689 Value *RCP_A_E = Builder.CreateAdd(RCP, E); in expandDivRem32() local
695 Value *Tmp0 = Builder.CreateSelect(RCP_HI_0_CC, RCP_A_E, RCP_S_E); in expandDivRem32()
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| D | AMDGPUISelLowering.cpp | 1804 SDValue RCP_A_E = DAG.getNode(ISD::ADD, DL, VT, RCP, E); in LowerUDIVREM() local
1811 RCP_A_E, RCP_S_E, in LowerUDIVREM()
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | udivrem.ll | 36 ; SI-DAG: v_add_i32_e32 [[RCP_A_E:v[0-9]+]], vcc, [[E]], [[RCP]]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 1454 SDValue RCP_A_E = DAG.getNode(ISD::ADD, DL, VT, RCP, E); in LowerUDIVREM() local
1461 RCP_A_E, RCP_S_E, in LowerUDIVREM()
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