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Searched refs:REGION_ADDRESS (Results 1 – 13 of 13) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUAliasAnalysis.cpp77 AS.REGION_ADDRESS == 2 && in ASAliasRulesTy()
89 AS.REGION_ADDRESS == 5 && in ASAliasRulesTy()
DAMDGPUTargetMachine.h65 if (AddrSpace == AS.LOCAL_ADDRESS || AddrSpace == AS.REGION_ADDRESS) in getNullPointerValue()
DAMDGPUAlwaysInlinePass.cpp125 if (AS != AMDGPUAS::LOCAL_ADDRESS && AS != AMDGPUAS.REGION_ADDRESS) in runOnModule()
DAMDGPU.h228 unsigned REGION_ADDRESS; ///< Address space for region memory. member
DAMDGPUTargetTransformInfo.cpp265 AddrSpace == AS.REGION_ADDRESS) in getLoadStoreVecRegBitWidth()
650 AddrSpace == AS.REGION_ADDRESS) in getLoadStoreVecRegBitWidth()
DAMDGPUHSAMetadataStreamer.cpp89 if (AddressSpace == AMDGPUASI.REGION_ADDRESS) in getAddressSpaceQualifer()
DSIMemoryLegalizer.cpp464 if (AS == SIAddrSpaceInfo.REGION_ADDRESS) in toSIAtomicAddrSpace()
DSIISelLowering.cpp989 AS == AMDGPUASI.REGION_ADDRESS) { in isLegalAddressingMode()
1047 AddrSpace == AMDGPUASI.REGION_ADDRESS) { in allowsMisalignedMemoryAccesses()
DAMDGPUISelLowering.cpp1192 G->getAddressSpace() == AMDGPUASI.REGION_ADDRESS) { in LowerGlobalAddress()
/external/llvm/lib/Target/AMDGPU/
DAMDGPU.h141 REGION_ADDRESS = 5, ///< Address space for region memory. enumerator
DAMDGPUTargetTransformInfo.cpp90 case AMDGPUAS::REGION_ADDRESS: in getLoadStoreVecRegBitWidth()
DSIISelLowering.cpp399 case AMDGPUAS::REGION_ADDRESS: { in isLegalAddressingMode()
442 AddrSpace == AMDGPUAS::REGION_ADDRESS) { in allowsMisalignedMemoryAccesses()
2459 case AMDGPUAS::REGION_ADDRESS: { in canFoldOffset()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.cpp949 AS.REGION_ADDRESS = 2; in getAMDGPUAS()