Searched refs:REGLIST1 (Results 1 – 6 of 6) sorted by relevance
| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstX8632.def | 85 REGLIST1(RegX8632, sp)) \
87 REGLIST1(RegX8632, bp)) \
89 REGLIST1(RegX8632, si)) \
91 REGLIST1(RegX8632, di)) \
102 REGLIST1(RegX8632, esp)) \
104 REGLIST1(RegX8632, ebp)) \
106 REGLIST1(RegX8632, esi)) \
108 REGLIST1(RegX8632, edi)) \
118 // we use REGLIST1() to redundantly assign the register itself as an alias.
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| D | IceRegistersARM32.def | 21 X(Reg_ip, 12, "ip", 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, REGLIST1(RegARM32, ip)) \
22 X(Reg_sp, 13, "sp", 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, REGLIST1(RegARM32, sp)) \
23 X(Reg_lr, 14, "lr", 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, REGLIST1(RegARM32, lr)) \
24 X(Reg_pc, 15, "pc", 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, REGLIST1(RegARM32, pc))
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| D | IceRegList.h | 24 #define REGLIST1(ns, r0) \ macro
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| D | IceInstX8664.def | 224 // we use REGLIST1() to redundantly assign the register itself as an alias.
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| /external/llvm/test/CodeGen/ARM/ |
| D | memcpy-ldm-stm.ll | 75 ; CHECK: ldm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1:{.*}]]
76 ; CHECK: stm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1]]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | memcpy-ldm-stm.ll | 75 ; CHECK: ldm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1:{.*}]]
76 ; CHECK: stm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1]]
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