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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/GlobalISel/
Darm-isel-globals-ropi-rwpi.ll3 …ovt,+v8m -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,RO-DEFAULT-MOVT,RO-DEFAULT,RWPI…
4 …no-movt -global-isel %s -o - | FileCheck %s -check-prefixes=CHECK,RO-DEFAULT-NOMOVT,RO-DEFAULT,RWP…
70 ; RO-DEFAULT-MOVT: movw r[[ADDR:[0-9]+]], :lower16:internal_constant
71 ; RO-DEFAULT-MOVT-NEXT: movt r[[ADDR]], :upper16:internal_constant
72 ; RO-DEFAULT-NOMOVT: ldr r[[ADDR:[0-9]+]], [[LABEL:.L[[:alnum:]_]+]]
73 ; RO-DEFAULT-NEXT: ldr r0, [r[[ADDR]]]
74 ; RO-DEFAULT-NEXT: bx lr
75 ; RO-DEFAULT-NOMOVT: [[LABEL]]:
76 ; RO-DEFAULT-NOMOVT-NEXT: .long internal_constant
96 ; RO-DEFAULT-MOVT: movw r[[ADDR:[0-9]+]], :lower16:external_constant
[all …]
Darm-select-globals-ropi-rwpi.mir3 …achineinstrs %s -o - | FileCheck %s -check-prefixes=CHECK,RWPI-MOVT,RWPI,RO-DEFAULT-MOVT,RO-DEFAULT
4 …neinstrs %s -o - | FileCheck %s -check-prefixes=CHECK,RWPI-NOMOVT,RWPI,RO-DEFAULT-NOMOVT,RO-DEFAULT
98 # RO-DEFAULT-NOMOVT: constants:
99 # RO-DEFAULT-NOMOVT: id: 0
100 # RO-DEFAULT-NOMOVT: value: 'i32* @internal_constant'
106 ; RO-DEFAULT-MOVT: [[G:%[0-9]+]]:gpr = MOVi32imm @internal_constant
107 …; RO-DEFAULT-NOMOVT: [[G:%[0-9]+]]:gpr = LDRi12 %const.0, 0, 14, $noreg :: (load 4 from constant-p…
128 # RO-DEFAULT-NOMOVT: constants:
129 # RO-DEFAULT-NOMOVT: id: 0
130 # RO-DEFAULT-NOMOVT: value: 'i32* @external_constant'
[all …]
/external/llvm/lib/Target/Mips/
DMicroMipsInstrInfo.td186 RegisterOperand RO> :
187 InstSE<(outs), (ins RO:$rs, opnd:$offset),
196 class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
198 InstSE<(outs RO:$rt), (ins MemOpnd:$addr, RO:$src),
200 [(set RO:$rt, (OpNode addrimm12:$addr, RO:$src))],
206 class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
208 InstSE<(outs), (ins RO:$rt, MemOpnd:$addr),
210 [(OpNode RO:$rt, addrimm12:$addr)], NoItinerary, FrmI> {
229 class MovePMM16<string opstr, RegisterOperand RO> :
230 MicroMipsInst16<(outs movep_regpair:$dst_regs), (ins RO:$rs, RO:$rt),
[all …]
DMipsInstrInfo.td1096 class ArithLogicR<string opstr, RegisterOperand RO, bit isComm = 0,
1099 InstSE<(outs RO:$rd), (ins RO:$rs, RO:$rt),
1101 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
1108 class ArithLogicI<string opstr, Operand Od, RegisterOperand RO,
1112 InstSE<(outs RO:$rt), (ins RO:$rs, Od:$imm16),
1114 [(set RO:$rt, (OpNode RO:$rs, imm_type:$imm16))],
1130 class LogicNOR<string opstr, RegisterOperand RO>:
1131 InstSE<(outs RO:$rd), (ins RO:$rs, RO:$rt),
1133 [(set RO:$rd, (not (or RO:$rs, RO:$rt)))], II_NOR, FrmR, opstr> {
1139 RegisterOperand RO, InstrItinClass itin,
[all …]
DMicroMips64r6InstrInfo.td96 class EXTBITS_DESC_BASE<string instr_asm, RegisterOperand RO, Operand PosOpnd,
99 dag OutOperandList = (outs RO:$rt);
100 dag InOperandList = (ins RO:$rs, PosOpnd:$pos, SizeOpnd:$size);
102 list<dag> Pattern = [(set RO:$rt, (Op RO:$rs, imm:$pos, imm:$size))];
173 class DSUB_DESC_BASE<string instr_asm, RegisterOperand RO,
177 dag OutOperandList = (outs RO:$rd);
178 dag InOperandList = (ins RO:$rs, RO:$rt);
180 list<dag> Pattern = [(set RO:$rd, (OpNode RO:$rs, RO:$rt))];
DMicroMipsDSPInstrInfo.td218 RegisterOperand RO, Operand ImmOpnd> {
219 dag OutOperandList = (outs RO:$rt);
220 dag InOperandList = (ins RO:$rs, ImmOpnd:$sa);
222 list<dag> Pattern = [(set RO:$rt, (OpNode RO:$rs, ImmPat:$sa))];
254 InstrItinClass itin, RegisterOperand RO> {
255 dag OutOperandList = (outs RO:$rd);
256 dag InOperandList = (ins RO:$rt, GPR32Opnd:$rs);
258 list<dag> Pattern = [(set RO:$rd, (OpNode RO:$rt, GPR32Opnd:$rs))];
337 class MFHI_MM_DESC_BASE<string instr_asm, RegisterOperand RO, SDNode OpNode,
340 dag InOperandList = (ins RO:$ac);
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMicroMipsInstrInfo.td200 RegisterOperand RO> :
201 InstSE<(outs), (ins RO:$rs, opnd:$offset),
210 class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
212 InstSE<(outs RO:$rt), (ins MemOpnd:$addr, RO:$src),
214 [(set RO:$rt, (OpNode addrimm12:$addr, RO:$src))],
223 class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
225 InstSE<(outs), (ins RO:$rt, MemOpnd:$addr),
227 [(OpNode RO:$rt, addrimm12:$addr)], Itin, FrmI> {
249 class MovePMM16<string opstr, RegisterOperand RO> :
250 MicroMipsInst16<(outs movep_regpair:$dst_regs), (ins RO:$rs, RO:$rt),
[all …]
DMipsInstrInfo.td1360 class ArithLogicR<string opstr, RegisterOperand RO, bit isComm = 0,
1363 InstSE<(outs RO:$rd), (ins RO:$rs, RO:$rt),
1365 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
1372 class ArithLogicI<string opstr, Operand Od, RegisterOperand RO,
1376 InstSE<(outs RO:$rt), (ins RO:$rs, Od:$imm16),
1378 [(set RO:$rt, (OpNode RO:$rs, imm_type:$imm16))],
1394 class LogicNOR<string opstr, RegisterOperand RO>:
1395 InstSE<(outs RO:$rd), (ins RO:$rs, RO:$rt),
1397 [(set RO:$rd, (not (or RO:$rs, RO:$rt)))], II_NOR, FrmR, opstr> {
1403 RegisterOperand RO, InstrItinClass itin,
[all …]
/external/ltp/testcases/kernel/fs/fs_readonly/
Dtest_robind.sh143 local RO=$3
158 if [ "$RO" = "false" -a $tst_result -ne 0 -o "$RO" = "true" -a \
163 $dir $fs_type read-only flag: $RO"
166 $dir $fs_type read-only flag: $RO"
/external/u-boot/board/freescale/m5253evbe/
DREADME60 FFE00000 RO FFE04000 RO FFE06000 RO FFE08000 RO FFE10000 RO
/external/autotest/server/site_tests/firmware_Fingerprint/
Dcontrol.reboot_to_ro10 Validates that booting into RO fingerprint firmware succeeds.
13 Fails if unable to boot into RO fingerprint firmware.
24 Attempts to reboot into RO firmware and validates that it succeeds. Then
Dcontrol.rw_no_update_ro10 Verify HW write protect prevents RO fingerprint firmware modification.
13 Fails if the RO firmware can be written while HW write protect is enabled.
24 Enables hardware write protect, attempts to flash the RO fingerprint firmware,
Dcontrol.ro_only_boots_valid_rw10 Verify the RO fingerprint firmware only boots valid RW firmware.
13 Fails if the RO firmware boots invalid RW firmware.
26 flash successfully, but fail to boot (i.e., stay in RO mode). Finally, it
Dcontrol.add_entropy13 Fails if we can add entropy from RW or cannot add entropy from RO."
25 Adds entropy from RO firmware and verifies that rollback block ID increments by
Dcontrol.sw_write_protect14 Fails if we can disable software write protect from RO or RW."
25 Reboots to RO, attempts to disable software write protect while hardware write
Dcontrol.ro_can_update_rw10 Validates that the RO fingerprint firmware can update the RW firmware.
13 Fails if the RO fingerprint firmware cannot update the RW firmware.
/external/autotest/server/site_tests/firmware_RONormalBoot/
Dcontrol9 PURPOSE = "Servo based firmware RO normal boot test"
10 CRITERIA = "This test will fail if disabling RO normal boot flag boots failed"
19 This test disables the RO normal boot flag and checks the next boot result.
Dcontrol.dev9 PURPOSE = "Servo based firmware RO normal boot test"
10 CRITERIA = "This test will fail if disabling RO normal boot flag boots failed"
19 This test disables the RO normal boot flag and checks the next boot result.
Dcontrol.ec_wp9 PURPOSE = "Servo based firmware RO normal boot test"
10 CRITERIA = "This test will fail if disabling RO normal boot flag boots failed"
20 This test disables the RO normal boot flag and checks the next boot result.
/external/autotest/server/site_tests/firmware_ECWriteProtect/
Dcontrol20 This test starts with RO normal mode and enables EC write protect. Software sync
28 - Cold reset. RO normal.
32 RO normal mode.
Dcontrol.dev20 This test starts with RO normal mode and enables EC write protect. Software sync
28 - Cold reset. RO normal.
32 RO normal mode.
/external/swiftshader/third_party/LLVM/lib/Analysis/
DScalarEvolutionNormalization.cpp185 const SCEV *RO = X->getRHS(); in TransformImpl() local
187 const SCEV *RN = TransformSubExpr(RO, User, OperandValToReplace); in TransformImpl()
188 if (LO != LN || RO != RN) in TransformImpl()
/external/llvm/lib/Analysis/
DScalarEvolutionNormalization.cpp215 const SCEV *RO = X->getRHS(); in TransformImpl() local
217 const SCEV *RN = TransformSubExpr(RO, User, OperandValToReplace); in TransformImpl()
218 if (LO != LN || RO != RN) in TransformImpl()
/external/python/cpython2/Modules/_sqlite/
Dconnection.c1632 {"Warning", T_OBJECT, offsetof(pysqlite_Connection, Warning), RO},
1633 {"Error", T_OBJECT, offsetof(pysqlite_Connection, Error), RO},
1634 {"InterfaceError", T_OBJECT, offsetof(pysqlite_Connection, InterfaceError), RO},
1635 {"DatabaseError", T_OBJECT, offsetof(pysqlite_Connection, DatabaseError), RO},
1636 {"DataError", T_OBJECT, offsetof(pysqlite_Connection, DataError), RO},
1637 {"OperationalError", T_OBJECT, offsetof(pysqlite_Connection, OperationalError), RO},
1638 {"IntegrityError", T_OBJECT, offsetof(pysqlite_Connection, IntegrityError), RO},
1639 {"InternalError", T_OBJECT, offsetof(pysqlite_Connection, InternalError), RO},
1640 {"ProgrammingError", T_OBJECT, offsetof(pysqlite_Connection, ProgrammingError), RO},
1641 {"NotSupportedError", T_OBJECT, offsetof(pysqlite_Connection, NotSupportedError), RO},
/external/python/cpython2/Modules/
Dsunaudiodev.c359 { "i_open", T_UBYTE, OFF(record.open) , RO},
360 { "i_active", T_UBYTE, OFF(record.active) , RO},
378 { "o_open", T_UBYTE, OFF(play.open) , RO},
379 { "o_active", T_UBYTE, OFF(play.active) , RO},

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