| /external/aac/libAACenc/src/ |
| D | metadata_compressor.cpp | 125 enum { L = 0, R = 1, C = 2, LFE = 3, LS = 4, RS = 5, S = 6, LS2 = 7, RS2 = 8 }; enumerator
547 if (drcComp->channelIdx[RS2] >= 0) in findPeakLevels()
549 (FIXP_PCM)pSamples[drcComp->channelIdx[RS2]]) >> in findPeakLevels()
589 if (drcComp->channelIdx[RS2] >= 0) in findPeakLevels()
591 (FIXP_PCM)pSamples[drcComp->channelIdx[RS2]]) >> in findPeakLevels()
593 if ((drcComp->channelIdx[RS] >= 0) && (drcComp->channelIdx[RS2] >= 0)) in findPeakLevels()
802 if (drcComp->channelIdx[RS2] >= 0) in findPeakLevels()
804 fMultDiv2(slev, (FIXP_PCM)pSamples[drcComp->channelIdx[RS2]]) >> in findPeakLevels()
806 if ((drcComp->channelIdx[RS] >= 0) && (drcComp->channelIdx[RS2] >= 0)) in findPeakLevels()
952 if (drcComp->channelIdx[RS2] >= 0) in findPeakLevels()
[all …]
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 883 unsigned RS2 = getRegState(Op2); in splitAslOr() local
907 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR); in splitAslOr()
910 .addReg(Op2.getReg(), RS2, HiSR); in splitAslOr()
914 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
918 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
927 .addReg(Op2.getReg(), RS2, HiSR) in splitAslOr()
938 .addReg(Op2.getReg(), RS2, LoSR); in splitAslOr()
949 .addReg(Op2.getReg(), RS2, LoSR) in splitAslOr()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 924 unsigned RS2 = getRegState(Op2); in splitAslOr() local
948 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR); in splitAslOr()
951 .addReg(Op2.getReg(), RS2, HiSR); in splitAslOr()
955 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
959 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
968 .addReg(Op2.getReg(), RS2, HiSR) in splitAslOr()
979 .addReg(Op2.getReg(), RS2, LoSR); in splitAslOr()
990 .addReg(Op2.getReg(), RS2, LoSR) in splitAslOr()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| D | SparcAsmPrinter.cpp | 146 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD() argument
148 EmitBinary(OutStreamer, SP::ADDrr, RS1, RS2, RD, STI); in EmitADD()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcAsmPrinter.cpp | 148 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD() argument
150 EmitBinary(OutStreamer, SP::ADDrr, RS1, RS2, RD, STI); in EmitADD()
|
| /external/llvm/utils/TableGen/ |
| D | AsmMatcherEmitter.cpp | 1277 for (const RegisterSet &RS2 : RegisterSets) in buildRegisterClasses() local
1278 if (RS != RS2 && in buildRegisterClasses()
1279 std::includes(RS2.begin(), RS2.end(), RS.begin(), RS.end(), in buildRegisterClasses()
1281 CI->SuperClasses.push_back(RegisterSetClasses[RS2]); in buildRegisterClasses()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | AsmMatcherEmitter.cpp | 1286 for (const RegisterSet &RS2 : RegisterSets) in buildRegisterClasses() local
1287 if (RS != RS2 && in buildRegisterClasses()
1288 std::includes(RS2.begin(), RS2.end(), RS.begin(), RS.end(), in buildRegisterClasses()
1290 CI->SuperClasses.push_back(RegisterSetClasses[RS2]); in buildRegisterClasses()
|
| /external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
| D | 2013-1_UNLOCODE_CodeListPart1.csv | 23285 ,"DE","RS2","Rodersheim-Gronau","Rodersheim-Gronau","RP","-----6--","RL","1107",,"4928N 00815E",
37746 ,"FR","RS2","Les Rousses","Les Rousses","39","-----6--","RQ","0907",,"4629N 00604E",
|
| D | 2013-1_UNLOCODE_CodeListPart3.csv | 22938 ,"US","RS2","Reeds Spring","Reeds Spring","MO","-23-----","RL","0607",,"3645N 09323W",
|