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Searched refs:RS_Split (Results 1 – 4 of 4) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/CodeGen/
DRegAllocGreedy.cpp109 RS_Split, enumerator
413 if (ExtraRegInfo[Reg].Stage == RS_Split) { in enqueue()
1568 if (Stage != RS_Split) in selectOrSplit()
1577 if (Stage < RS_Split) { in selectOrSplit()
1578 setStage(VirtReg, RS_Split); in selectOrSplit()
/external/llvm/lib/CodeGen/
DRegAllocGreedy.cpp160 RS_Split, enumerator
551 if (ExtraRegInfo[Reg].Stage == RS_Split) { in enqueue()
2265 if (getStage(VirtReg) < RS_Split) { in tryAssignCSRFirstTime()
2508 if (Stage != RS_Split) in selectOrSplitImpl()
2527 if (Stage < RS_Split) { in selectOrSplitImpl()
2528 setStage(VirtReg, RS_Split); in selectOrSplitImpl()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dregalloc-advanced-split-cost.ll17 ; CHECK: RS_Split Cascade 1
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DRegAllocGreedy.cpp204 RS_Split, enumerator
693 if (ExtraRegInfo[Reg].Stage == RS_Split) { in enqueue()
2774 if (getStage(VirtReg) < RS_Split) { in tryAssignCSRFirstTime()
3020 if (Stage != RS_Split) in selectOrSplitImpl()
3042 if (Stage < RS_Split) { in selectOrSplitImpl()
3043 setStage(VirtReg, RS_Split); in selectOrSplitImpl()