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Searched refs:RegI (Results 1 – 9 of 9) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/IPO/
DCalledValuePropagation.cpp247 auto RegI = CVPLatticeKey(I.getReturnValue(), IPOGrouping::Register); in visitReturn() local
250 MergeValues(SS.getValueState(RegI), SS.getValueState(RetF)); in visitReturn()
262 auto RegI = CVPLatticeKey(I, IPOGrouping::Register); in visitCallSite() local
275 ChangedValues[RegI] = getOverdefinedVal(); in visitCallSite()
296 ChangedValues[RegI] = in visitCallSite()
297 MergeValues(SS.getValueState(RegI), SS.getValueState(RetF)); in visitCallSite()
305 auto RegI = CVPLatticeKey(&I, IPOGrouping::Register); in visitSelect() local
308 ChangedValues[RegI] = in visitSelect()
318 auto RegI = CVPLatticeKey(&I, IPOGrouping::Register); in visitLoad() local
321 ChangedValues[RegI] = in visitLoad()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/unittests/Analysis/
DSparsePropagation.cpp167 auto RegI = TestLatticeKey(I, IPOGrouping::Register); in visitCallSite() local
169 ChangedValues[RegI] = getOverdefinedVal(); in visitCallSite()
181 ChangedValues[RegI] = in visitCallSite()
182 MergeValues(SS.getValueState(RegI), SS.getValueState(RetF)); in visitCallSite()
220 auto RegI = TestLatticeKey(&I, IPOGrouping::Register); in visitInst() local
221 ChangedValues[RegI] = getOverdefinedVal(); in visitInst()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/
DARCFrameLowering.cpp352 auto RegI = getSavedReg(CSI, Which); in assignCalleeSavedSpillSlots() local
353 if (RegI == CSI.end() || RegI->getFrameIdx() == 0) { in assignCalleeSavedSpillSlots()
357 if (RegI != CSI.end()) in assignCalleeSavedSpillSlots()
358 RegI->setFrameIdx(FI); in assignCalleeSavedSpillSlots()
360 MFI.setObjectOffset(RegI->getFrameIdx(), CurOffset); in assignCalleeSavedSpillSlots()
/external/llvm/lib/Target/AMDGPU/
DSIMachineScheduler.cpp1577 for (std::map<unsigned, unsigned>::iterator RegI = in blockScheduled() local
1579 E = LiveOutRegsNumUsages[Block->getID()].end(); RegI != E; ++RegI) { in blockScheduled()
1580 std::pair<unsigned, unsigned> RegP = *RegI; in blockScheduled()
1766 for (_Iterator RegI = First; RegI != End; ++RegI) { in fillVgprSgprCost() local
1767 unsigned Reg = *RegI; in fillVgprSgprCost()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIMachineScheduler.cpp1732 for (std::map<unsigned, unsigned>::iterator RegI = in blockScheduled() local
1734 E = LiveOutRegsNumUsages[Block->getID()].end(); RegI != E; ++RegI) { in blockScheduled()
1735 std::pair<unsigned, unsigned> RegP = *RegI; in blockScheduled()
1914 for (_Iterator RegI = First; RegI != End; ++RegI) { in fillVgprSgprCost() local
1915 unsigned Reg = *RegI; in fillVgprSgprCost()
/external/llvm/utils/TableGen/
DCodeGenRegisters.cpp156 CodeGenRegister::Vec::const_iterator RegI, RegE; member in __anon69515c8a0111::RegUnitIterator
161 RegI(Regs.begin()), RegE(Regs.end()), UnitI(), UnitE() { in RegUnitIterator()
163 if (RegI != RegE) { in RegUnitIterator()
164 UnitI = (*RegI)->getRegUnits().begin(); in RegUnitIterator()
165 UnitE = (*RegI)->getRegUnits().end(); in RegUnitIterator()
174 const CodeGenRegister *getReg() const { assert(isValid()); return *RegI; } in getReg()
186 if (++RegI == RegE) in advance()
188 UnitI = (*RegI)->getRegUnits().begin(); in advance()
189 UnitE = (*RegI)->getRegUnits().end(); in advance()
/external/llvm/lib/CodeGen/
DInlineSpiller.cpp593 RegI = MRI.reg_bundle_begin(Reg), E = MRI.reg_bundle_end(); in reMaterializeAll() local
594 RegI != E; ) { in reMaterializeAll()
595 MachineInstr &MI = *RegI++; in reMaterializeAll()
872 RegI = MRI.reg_bundle_begin(Reg), E = MRI.reg_bundle_end(); in spillAroundUses() local
873 RegI != E; ) { in spillAroundUses()
874 MachineInstr *MI = &*(RegI++); in spillAroundUses()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DInlineSpiller.cpp615 RegI = MRI.reg_bundle_begin(Reg), E = MRI.reg_bundle_end(); in reMaterializeAll() local
616 RegI != E; ) { in reMaterializeAll()
617 MachineInstr &MI = *RegI++; in reMaterializeAll()
934 RegI = MRI.reg_bundle_begin(Reg), E = MRI.reg_bundle_end(); in spillAroundUses() local
935 RegI != E; ) { in spillAroundUses()
936 MachineInstr *MI = &*(RegI++); in spillAroundUses()
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DCodeGenRegisters.cpp208 CodeGenRegister::Vec::const_iterator RegI, RegE; member in __anona3434fc20111::RegUnitIterator
213 RegI(Regs.begin()), RegE(Regs.end()) { in RegUnitIterator()
215 if (RegI != RegE) { in RegUnitIterator()
216 UnitI = (*RegI)->getRegUnits().begin(); in RegUnitIterator()
217 UnitE = (*RegI)->getRegUnits().end(); in RegUnitIterator()
226 const CodeGenRegister *getReg() const { assert(isValid()); return *RegI; } in getReg()
238 if (++RegI == RegE) in advance()
240 UnitI = (*RegI)->getRegUnits().begin(); in advance()
241 UnitE = (*RegI)->getRegUnits().end(); in advance()