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Searched refs:RegSizeInfo (Results 1 – 4 of 4) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DInfoByHwMode.cpp118 RegSizeInfo::RegSizeInfo(Record *R, const CodeGenHwModes &CGH) { in RegSizeInfo() function in RegSizeInfo
124 bool RegSizeInfo::operator< (const RegSizeInfo &I) const { in operator <()
129 bool RegSizeInfo::isSubClassOf(const RegSizeInfo &I) const { in isSubClassOf()
135 void RegSizeInfo::writeToStream(raw_ostream &OS) const { in writeToStream()
144 auto I = Map.insert({P.first, RegSizeInfo(P.second, CGH)}); in RegSizeInfoByHwMode()
168 const RegSizeInfo &A0 = get(M0); in hasStricterSpillThan()
169 const RegSizeInfo &B0 = I.get(M0); in hasStricterSpillThan()
197 raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T) { in operator <<()
DInfoByHwMode.h141 struct RegSizeInfo { struct
146 RegSizeInfo(Record *R, const CodeGenHwModes &CGH); argument
147 RegSizeInfo() = default;
148 bool operator< (const RegSizeInfo &I) const;
149 bool operator== (const RegSizeInfo &I) const {
153 bool operator!= (const RegSizeInfo &I) const {
157 bool isSubClassOf(const RegSizeInfo &I) const;
161 struct RegSizeInfoByHwMode : public InfoByHwMode<RegSizeInfo> {
177 raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T);
DRegisterInfoEmitter.cpp1246 const RegSizeInfo &RI = RC.RSI.get(M); in runTargetDesc()
DCodeGenRegisters.cpp788 RegSizeInfo RI; in CodeGenRegisterClass()