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Searched refs:SCRATCH_RSRC_DWORD0 (Results 1 – 21 of 21) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dreloc.s28 s_mov_b32 s0, SCRATCH_RSRC_DWORD0
36 v_mov_b32 v0, SCRATCH_RSRC_DWORD0
50 .globl SCRATCH_RSRC_DWORD0 symbol
/external/llvm/test/MC/AMDGPU/
Dreloc.s10 s_mov_b32 s0, SCRATCH_RSRC_DWORD0
16 .globl SCRATCH_RSRC_DWORD0 symbol
/external/llvm/test/CodeGen/AMDGPU/
Dlarge-alloca-graphics.ll5 ; GCN-DAG: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
26 ; GCN-DAG: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
Dlarge-alloca-compute.ll10 ; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
11 ; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD0
Dpromote-alloca-stored-pointer-value.ll28 ; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
43 ; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
Dtarget-cpu.ll93 ; CHECK: SCRATCH_RSRC_DWORD0
Dvgpr-spill-emergency-stack-slot.ll16 ; GCN-DAG: s_mov_b32 s16, SCRATCH_RSRC_DWORD0
Dvgpr-spill-emergency-stack-slot-compute.ll23 ; GCNMESA-DAG: s_mov_b32 s12, SCRATCH_RSRC_DWORD0
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dlarge-alloca-graphics.ll6 ; GCN-DAG: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
28 ; GCN-DAG: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
Dlarge-alloca-compute.ll11 ; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
12 ; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD0
Dpromote-alloca-stored-pointer-value.ll28 ; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
43 ; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
Dscratch-simple.ll11 ; GCN-DAG: s_mov_b32 s4, SCRATCH_RSRC_DWORD0
29 ; GCN-DAG: s_mov_b32 s4, SCRATCH_RSRC_DWORD0
41 ; GCN-DAG: s_mov_b32 s4, SCRATCH_RSRC_DWORD0
52 ; SI: s_mov_b32 s4, SCRATCH_RSRC_DWORD0
57 ; GFX9: s_mov_b32 s0, SCRATCH_RSRC_DWORD0
69 ; SI: s_mov_b32 s4, SCRATCH_RSRC_DWORD0
73 ; GFX9: s_mov_b32 s0, SCRATCH_RSRC_DWORD0
84 ; GCN: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
105 ; GCN: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
Dframe-index-amdgiz.ll17 ; CHECK: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
Dmemory-legalizer-multiple-mem-operands-atomics.mir20 $sgpr8 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11
Dsi-spill-sgpr-stack.ll6 ; ALL: s_mov_b32 s[[LO:[0-9]+]], SCRATCH_RSRC_DWORD0
Dtarget-cpu.ll93 ; CHECK: SCRATCH_RSRC_DWORD0
Dmemory-legalizer-multiple-mem-operands-nontemporal-1.mir118 $sgpr8 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11
Dmemory-legalizer-multiple-mem-operands-nontemporal-2.mir118 $sgpr8 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11
Dspill-m0.ll10 ; TOSMEM: s_mov_b32 s[[LO:[0-9]+]], SCRATCH_RSRC_DWORD0
Dvgpr-spill-emergency-stack-slot.ll17 ; GCN-DAG: s_mov_b32 s[[DESC0:[0-9]+]], SCRATCH_RSRC_DWORD0
Dvgpr-spill-emergency-stack-slot-compute.ll25 ; GCNMESA-DAG: s_mov_b32 s12, SCRATCH_RSRC_DWORD0