| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 717 SETOGE, // 0 0 1 1 True if ordered and greater than or equal enumerator
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 855 SETOGE, // 0 0 1 1 True if ordered and greater than or equal enumerator
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 918 SETOGE, // 0 0 1 1 True if ordered and greater than or equal enumerator
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | README.txt | 69 SETOGE unimplemented
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 166 case FCmpInst::FCMP_OGE: return ISD::SETOGE; in getFCmpCondCode()
190 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
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| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 167 case FCmpInst::FCMP_OGE: return ISD::SETOGE; in getFCmpCondCode()
191 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | Analysis.cpp | 157 case FCmpInst::FCMP_OGE: FOC = ISD::SETGE; FPC = ISD::SETOGE; break; in getFCmpCondCode()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrFloat.td | 60 defm GE : ComparisonFP<SETOGE, "ge ">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrFloat.td | 60 defm GE : ComparisonFP<SETOGE, "ge ", 0x60, 0x66>;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIInsertSkips.cpp | 202 case ISD::SETOGE: in kill()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelDAGToDAG.cpp | 319 case ISD::SETGE: case ISD::SETOGE: case ISD::SETUGE: in Select()
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 549 case ISD::SETOGE: in getPredicateForSetCC()
598 case ISD::SETOGE: in getCRIdxForSetCC()
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeInstrFPU.td | 175 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETOGE),
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 333 case ISD::SETOGE: return "setoge"; in getOperationName()
|
| D | TargetLowering.cpp | 174 case ISD::SETOGE: in softenSetCCOperands()
1959 isCondCodeLegal(ISD::SETOGE, N0.getSimpleValueType())) in SimplifySetCC()
1960 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGE); in SimplifySetCC()
1962 isCondCodeLegal(ISD::SETOGE, N0.getSimpleValueType())) in SimplifySetCC()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2094 case ISD::SETOGE: in getPredicateForSetCC()
2139 case ISD::SETOGE: in getCRIdxForSetCC()
2162 case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break; in getVCmpInst()
2173 case ISD::SETULT: CC = ISD::SETOGE; Negate = true; break; in getVCmpInst()
2193 case ISD::SETOGE: in getVCmpInst()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 362 case ISD::SETOGE: return "setoge"; in getOperationName()
|
| D | TargetLowering.cpp | 179 case ISD::SETOGE: in softenSetCCOperands()
2600 isCondCodeLegal(ISD::SETOGE, N0.getSimpleValueType())) in SimplifySetCC()
2601 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGE); in SimplifySetCC()
2603 isCondCodeLegal(ISD::SETOGE, N0.getSimpleValueType())) in SimplifySetCC()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 3629 case ISD::SETOGE: in SelectCC()
3656 case ISD::SETOGE: in SelectCC()
3685 case ISD::SETOGE: in getPredicateForSetCC()
3730 case ISD::SETOGE: in getCRIdxForSetCC()
3753 case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break; in getVCmpInst()
3764 case ISD::SETULT: CC = ISD::SETOGE; Negate = true; break; in getVCmpInst()
3784 case ISD::SETOGE: in getVCmpInst()
|
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 492 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
774 (setcc node:$lhs, node:$rhs, SETOGE)>;
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 656 case ISD::SETOGE: in EmitCmp()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 101 [{return N->get() == ISD::SETOGE || N->get() == ISD::SETGE;}]
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 592 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
977 (setcc node:$lhs, node:$rhs, SETOGE)>;
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 2378 isCondCodeLegal(ISD::SETOGE, N0.getValueType())) in SimplifySetCC()
2379 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGE); in SimplifySetCC()
2381 isCondCodeLegal(ISD::SETOGE, N0.getValueType())) in SimplifySetCC()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 573 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
1106 (setcc node:$lhs, node:$rhs, SETOGE)>;
|