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Searched refs:SI_CONTEXT_INV_GLOBAL_L2 (Results 1 – 5 of 5) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_pipe.h62 #define SI_CONTEXT_INV_GLOBAL_L2 (1 << 6) macro
876 sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2; in si_make_CB_shader_coherent()
881 sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2; in si_make_CB_shader_coherent()
898 sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2; in si_make_DB_shader_coherent()
903 sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2; in si_make_DB_shader_coherent()
Dsi_state_draw.c1010 if (rctx->flags & SI_CONTEXT_INV_GLOBAL_L2) { in si_emit_cache_flush()
1016 rctx->flags &= ~(SI_CONTEXT_INV_GLOBAL_L2 | in si_emit_cache_flush()
1039 SI_CONTEXT_INV_GLOBAL_L2 | in si_emit_cache_flush()
1054 if (rctx->flags & SI_CONTEXT_INV_GLOBAL_L2 || in si_emit_cache_flush()
Dsi_hw_context.c114 ctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2 | in si_context_gfx_flush()
Dsi_cp_dma.c140 (sctx->b.chip_class == SI ? SI_CONTEXT_INV_GLOBAL_L2 : 0); in get_flush_flags()
Dsi_pipe.c844 sscreen->barrier_flags.cp_to_L2 |= SI_CONTEXT_INV_GLOBAL_L2; in radeonsi_screen_create()