Searched refs:SPSR_irq (Results 1 – 15 of 15) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 56 @ CHECK-ARM: mrs r1, SPSR_irq @ encoding: [0x00,0x13,0x40,0xe1]
59 @ CHECK-THUMB: mrs r1, SPSR_irq @ encoding: [0xf0,0xf3,0x30,0x81]
166 @ CHECK-ARM: msr SPSR_irq, r11 @ encoding: [0x0b,0xf3,0x60,0xe1]
169 @ CHECK-THUMB: msr SPSR_irq, r11 @ encoding: [0x9b,0xf3,0x30,0x80]
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| /external/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 56 @ CHECK-ARM: mrs r1, SPSR_irq @ encoding: [0x00,0x13,0x40,0xe1]
59 @ CHECK-THUMB: mrs r1, SPSR_irq @ encoding: [0xf0,0xf3,0x30,0x81]
166 @ CHECK-ARM: msr SPSR_irq, r11 @ encoding: [0x0b,0xf3,0x60,0xe1]
169 @ CHECK-THUMB: msr SPSR_irq, r11 @ encoding: [0x9b,0xf3,0x30,0x80]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-arm.txt | 41 @ CHECK: mrs r1, SPSR_irq
115 @ CHECK: msr SPSR_irq, r11
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| D | move-banked-regs-thumb.txt | 40 @ CHECK: mrs r1, SPSR_irq
117 @ CHECK: msr SPSR_irq, r11
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-arm.txt | 41 @ CHECK: mrs r1, SPSR_irq
115 @ CHECK: msr SPSR_irq, r11
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| D | move-banked-regs-thumb.txt | 40 @ CHECK: mrs r1, SPSR_irq
117 @ CHECK: msr SPSR_irq, r11
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| /external/vixl/src/aarch32/ |
| D | instructions-aarch32.cc | 344 case SPSR_irq: in GetName()
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| D | instructions-aarch32.h | 816 SPSR_irq = 0x30, enumerator
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | basic-a64-instructions.s | 3806 msr SPSR_irq, x12
4354 mrs x9, SPSR_irq
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| /external/llvm/test/MC/AArch64/ |
| D | basic-a64-instructions.s | 3823 msr SPSR_irq, x12
4371 mrs x9, SPSR_irq
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 385 SPSR_irq = 57880,
2212 { "SPSR_irq", 0xE218, true, true, {} }, // 230
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 574 def : RWSysReg<"SPSR_irq", 0b11, 0b100, 0b0100, 0b0011, 0b000>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 744 def : RWSysReg<"SPSR_irq", 0b11, 0b100, 0b0100, 0b0011, 0b000>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | basic-a64-instructions.txt | 3280 # CHECK: msr {{SPSR_irq|SPSR_IRQ}}, x12
3573 # CHECK: mrs x9, {{SPSR_irq|SPSR_IRQ}}
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | basic-a64-instructions.txt | 3296 # CHECK: msr {{SPSR_irq|SPSR_IRQ}}, x12
3588 # CHECK: mrs x9, {{SPSR_irq|SPSR_IRQ}}
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