Home
last modified time | relevance | path

Searched refs:SRDS_PLLCR0_RFCK_SEL_MASK (Results 1 – 10 of 10) sorted by relevance

/external/u-boot/board/freescale/p2041rdb/
Dp2041rdb.c202 expected &= SRDS_PLLCR0_RFCK_SEL_MASK; in misc_init_r()
/external/u-boot/board/freescale/corenet_ds/
Dcorenet_ds.c174 u32 expected = srds_regs->bank[i].pllcr0 & SRDS_PLLCR0_RFCK_SEL_MASK; in misc_init_r()
/external/u-boot/board/keymile/kmp204x/
Dkmp204x.c188 actual &= SRDS_PLLCR0_RFCK_SEL_MASK; in misc_init_r()
/external/u-boot/board/freescale/t1040qds/
Dt1040qds.c227 u32 expected = pllcr0 & SRDS_PLLCR0_RFCK_SEL_MASK; in misc_init_r()
/external/u-boot/arch/arm/include/asm/arch-ls102xa/
Dimmap_ls102xa.h322 #define SRDS_PLLCR0_RFCK_SEL_MASK 0x70000000 macro
/external/u-boot/board/freescale/t4qds/
Dt4240qds.c668 expected = pllcr0 & SRDS_PLLCR0_RFCK_SEL_MASK; in misc_init_r()
/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dfsl_corenet_serdes.c401 SRDS_PLLCR0_RFCK_SEL_MASK, rfck_sel); in p4080_erratum_serdes8()
/external/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
Dimmap_lsch2.h552 #define SRDS_PLLCR0_RFCK_SEL_MASK 0x70000000 macro
/external/u-boot/board/freescale/b4860qds/
Db4860qds.c1180 u32 expected = pllcr0 & SRDS_PLLCR0_RFCK_SEL_MASK; in misc_init_r()
/external/u-boot/arch/powerpc/include/asm/
Dimmap_85xx.h2544 #define SRDS_PLLCR0_RFCK_SEL_MASK 0x70000000 macro
2627 #define SRDS_PLLCR0_RFCK_SEL_MASK 0x70000000 macro