/external/u-boot/arch/powerpc/cpu/mpc85xx/ |
D | p3041_serdes.c | 16 [0x4] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1, 19 [0xb] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO2, SRIO2, SRIO1, SRIO1, 41 SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, SRIO1, SRIO1, SRIO1, 42 SRIO1, }, 43 [0x17] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1, 46 [0x18] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1, 50 [0x1b] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1, 53 [0x1d] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1, 56 [0x20] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1, 60 [0x21] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1, [all …]
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D | p5020_serdes.c | 16 [0x4] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1, 19 [0xb] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO2, SRIO2, SRIO1, SRIO1, 41 SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, SRIO1, SRIO1, SRIO1, 42 SRIO1, }, 43 [0x17] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1, 46 [0x18] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1, 50 [0x1b] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1, 53 [0x1d] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1, 56 [0x20] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1, 60 [0x21] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1, [all …]
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D | t4240_serdes.c | 214 {5, {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1} }, 215 {6, {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}}, 216 {7, {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1} }, 217 {8, {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1} }, 231 SRIO1, SRIO1, SRIO1, SRIO1} }, 233 SRIO1, SRIO1, SRIO1, SRIO1}}, 235 SRIO1, SRIO1, SRIO1, SRIO1}}, 237 SRIO1, SRIO1, SRIO1, SRIO1} }, 239 SRIO1, SRIO1, SRIO1, SRIO1}}, 241 SRIO1, SRIO1, SRIO1, SRIO1}}, [all …]
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D | mpc8569_serdes.c | 18 [0x1] = {SRIO1, SRIO2, SGMII_TSEC1, SGMII_TSEC2}, 19 [0x2] = {SRIO1, SRIO2, SGMII_TSEC1, SGMII_TSEC2}, 20 [0x3] = {SRIO1, SRIO2, NONE, NONE}, 23 [0x6] = {PCIE1, NONE, SRIO1, SRIO2}, 24 [0x7] = {PCIE1, PCIE1, SRIO1, SRIO2}, 25 [0x8] = {PCIE1, PCIE1, SRIO1, SRIO2}, 26 [0x9] = {SRIO1, SRIO1, SRIO1, SRIO1}, 27 [0xa] = {SRIO1, SRIO1, SRIO1, SRIO1}, 28 [0xb] = {SRIO1, SRIO1, SRIO1, SRIO1}, 29 [0xc] = {PCIE1, SRIO1, SGMII_TSEC1, SGMII_TSEC2},
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D | mpc8572_serdes.c | 19 [0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, 21 [0xb] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, 22 [0xc] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, 23 [0xd] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, 24 [0xe] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
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D | b4860_serdes.c | 95 AURORA, AURORA, SRIO1, SRIO1} }, 98 AURORA, AURORA, SRIO1, SRIO1}}, 101 AURORA, AURORA, SRIO1, SRIO1}}, 104 AURORA, AURORA, SRIO1, SRIO1} }, 107 AURORA, AURORA, SRIO1, SRIO1}}, 111 SRIO1, SRIO1}}, 114 SRIO1, SRIO1, SRIO1, SRIO1} }, 117 SRIO1, SRIO1, SRIO1, SRIO1}}, 120 SRIO1, SRIO1, SRIO1, SRIO1}}, 123 SRIO1, SRIO1, SRIO1, SRIO1}}, [all …]
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D | mpc8548_serdes.c | 17 [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, 18 [0x4] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, 19 [0x5] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, 20 [0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
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D | mpc8568_serdes.c | 17 [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, 18 [0x4] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, 19 [0x5] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, 20 [0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
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D | p4080_serdes.c | 36 [0x13] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1, 39 [0x16] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1, 43 [0x19] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1, 46 [0x1d] = {PCIE1, PCIE1, PCIE3, PCIE3, NONE, SRIO2, NONE, SRIO1, 49 [0x22] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1, 52 [0x25] = {PCIE1, PCIE1, PCIE3, PCIE3, SRIO1, SRIO1, SRIO1, SRIO1,
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D | t2080_serdes.c | 169 {0x29, {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1} }, 170 {0x2D, {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1} }, 171 {0x2E, {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1} },
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D | p2041_serdes.c | 13 [0x2] = {NONE, NONE, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1, 29 SRIO2, SRIO1, SRIO1, NONE, NONE, PCIE3, SGMII_FM1_DTSEC5, 32 PCIE2, SRIO1, SRIO1, NONE, NONE, AURORA,
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D | p2020_serdes.c | 21 [0x7] = {SRIO2, SRIO1, NONE, NONE}, 25 [0xb] = {SRIO2, SRIO1, SGMII_TSEC2, SGMII_TSEC3}, 26 [0xc] = {SRIO2, SRIO1, SGMII_TSEC2, SGMII_TSEC3}, 27 [0xd] = {PCIE1, SRIO1, SGMII_TSEC2, SGMII_TSEC3},
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D | fsl_corenet_serdes.c | 41 [SRIO1] = "SRIO1", 732 case SRIO1: in fsl_serdes_init() 754 case SRIO1: in fsl_serdes_init() 757 (lane_prtcl - SRIO1); in fsl_serdes_init()
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D | fsl_corenet2_serdes.c | 38 [SRIO1] = "SRIO1",
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/external/u-boot/arch/powerpc/cpu/mpc86xx/ |
D | mpc8641_serdes.c | 28 [0x5] = {SRIO1, SRIO1, SRIO1, SRIO1}, 29 [0x6] = {SRIO1, SRIO1, SRIO1, SRIO1}, 30 [0x7] = {SRIO1, SRIO1, SRIO1, SRIO1}, 31 [0x9] = {SRIO1, SRIO1, SRIO1, SRIO1}, 32 [0xa] = {SRIO1, SRIO1, SRIO1, SRIO1}, 33 [0xb] = {SRIO1, SRIO1, SRIO1, SRIO1},
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/external/u-boot/doc/ |
D | README.srio-pcie-boot-corenet | 55 c) Set environment variable "bootmaster" to "SRIO1" or "PCIE1" and save 57 setenv bootmaster SRIO1 110 4. Set and save the environment variable "bootmaster" with "SRIO1", "SRIO2"
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D | README.fsl-ddr | 418 SRIO1: disabled
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/external/u-boot/arch/powerpc/include/asm/ |
D | fsl_serdes.h | 23 SRIO1, enumerator
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/external/u-boot/arch/powerpc/cpu/mpc8xxx/ |
D | srio.c | 136 first = serdes_get_first_lane(SRIO1); in srio_erratum_a004034() 239 if (is_serdes_configured(SRIO1)) { in srio_init()
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D | fdt.c | 128 if (is_serdes_configured(SRIO1)) in ft_srio_setup()
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/external/u-boot/arch/arm/include/asm/arch-fsl-layerscape/ |
D | fsl_serdes.h | 74 SRIO1, enumerator
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