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Searched refs:SSCG_PLL_REFCLK_SEL_HDMI_PHY_27M (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-mx8m/
Dclock.h553 #define SSCG_PLL_REFCLK_SEL_HDMI_PHY_27M (2 << 16) macro
/external/u-boot/arch/arm/mach-imx/mx8m/
Dclock.c214 else if (pll_refclk_sel == SSCG_PLL_REFCLK_SEL_HDMI_PHY_27M) in decode_sscg_pll()