Searched refs:SUB_S (Results 1 – 9 of 9) sorted by relevance
| /external/v8/src/compiler/mips/ |
| D | instruction-scheduler-mips.cc | 324 SUB_S = 4, enumerator
621 return Latency::MUL_S + Latency::SUB_S; in MsubSLatency()
742 return 1 + Latency::MTC1 + Latency::BRANCH + Latency::SUB_S + in Trunc_uw_sLatency()
1689 return Latency::SUB_S; in GetInstructionLatency()
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| /external/v8/src/compiler/mips64/ |
| D | instruction-scheduler-mips64.cc | 355 SUB_S = 4, enumerator
1113 4 * Latency::BRANCH + Latency::SUB_S + 2 * Latency::TRUNC_L_S + in TruncUlSLatency()
1422 return Latency::SUB_S; in GetInstructionLatency()
1533 2 * Latency::TRUNC_W_S + Latency::SUB_S + OrLatency() + in GetInstructionLatency()
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| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | ir3.h | 1159 INSTR2(SUB_S) in INSTR0()
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| /external/v8/src/mips/ |
| D | constants-mips.h | 601 SUB_S = ((0U << 3) + 1), enumerator
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| D | assembler-mips.cc | 2756 GenInstrRegister(COP1, S, ft, fs, fd, SUB_S); in sub_s()
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| D | simulator-mips.cc | 3212 case SUB_S: in DecodeTypeRegisterSRsType()
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeMIPS_common.c | 183 #define SUB_S (HI(17) | FMT_S | LO(1)) macro
1524 FAIL_IF(push_inst(compiler, SUB_S | FMT(op) | FT(src2) | FS(src1) | FD(dst_r), MOVABLE_INS)); in sljit_emit_fop2()
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 632 SUB_S = ((0U << 3) + 1), enumerator
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| D | simulator-mips64.cc | 2665 case SUB_S: in DecodeTypeRegisterSRsType()
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