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Searched refs:SYSCON_CLKSET1_FCLK_DIV_SHIFT (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/cpu/arm920t/ep93xx/
Dspeed.c48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/external/u-boot/arch/arm/include/asm/arch-ep93xx/
Dep93xx.h640 #define SYSCON_CLKSET1_FCLK_DIV_SHIFT 25 macro