| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/Utils/ |
| D | ARMBaseInfo.cpp | 23 const MClassSysReg *lookupMClassSysRegBy12bitSYSmValue(unsigned SYSm) { in lookupMClassSysRegBy12bitSYSmValue() argument
24 return lookupMClassSysRegByM1Encoding12(SYSm); in lookupMClassSysRegBy12bitSYSmValue()
29 const MClassSysReg *lookupMClassSysRegAPSRNonDeprecated(unsigned SYSm) { in lookupMClassSysRegAPSRNonDeprecated() argument
30 return lookupMClassSysRegByM2M3Encoding8((1<<9)|(SYSm & 0xFF)); in lookupMClassSysRegAPSRNonDeprecated()
34 const MClassSysReg *lookupMClassSysRegBy8bitSYSmValue(unsigned SYSm) { in lookupMClassSysRegBy8bitSYSmValue() argument
35 return ARMSysReg::lookupMClassSysRegByM2M3Encoding8((1<<8)|(SYSm & 0xFF)); in lookupMClassSysRegBy8bitSYSmValue()
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| D | ARMBaseInfo.h | 138 const MClassSysReg *lookupMClassSysRegBy12bitSYSmValue(unsigned SYSm);
142 const MClassSysReg *lookupMClassSysRegAPSRNonDeprecated(unsigned SYSm);
145 const MClassSysReg *lookupMClassSysRegBy8bitSYSmValue(unsigned SYSm);
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | invalid-thumb-MSR-MClass.txt | 8 # invalid SYSm
22 # invalid mask = '11' with SYSm not in {0..3}
32 # invalid SYSm
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | invalid-thumb-MSR-MClass.txt | 8 # invalid SYSm
22 # invalid mask = '11' with SYSm not in {0..3}
32 # invalid SYSm
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 807 unsigned SYSm = Op.getImm() & 0xFFF; // 12-bit SYSm in printMSRMaskOperand() local
812 auto TheReg =ARMSysReg::lookupMClassSysRegBy12bitSYSmValue(SYSm); in printMSRMaskOperand()
820 SYSm &= 0xff; in printMSRMaskOperand()
824 auto TheReg = ARMSysReg::lookupMClassSysRegAPSRNonDeprecated(SYSm); in printMSRMaskOperand()
831 auto TheReg = ARMSysReg::lookupMClassSysRegBy8bitSYSmValue(SYSm); in printMSRMaskOperand()
837 O << SYSm; in printMSRMaskOperand()
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| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 784 unsigned SYSm = Op.getImm(); in printMSRMaskOperand() local
789 switch (SYSm) { in printMSRMaskOperand()
818 SYSm &= 0xff; in printMSRMaskOperand()
823 switch (SYSm) { in printMSRMaskOperand()
839 switch (SYSm) { in printMSRMaskOperand()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 4059 def t2MRS_M : T2I<(outs rGPR:$Rd), (ins msr_mask:$SYSm), NoItinerary,
4060 "mrs", "\t$Rd, $SYSm", []>,
4063 bits<8> SYSm;
4066 let Inst{7-0} = SYSm;
4118 def t2MSR_M : T2I<(outs), (ins msr_mask:$SYSm, rGPR:$Rn),
4119 NoItinerary, "msr", "\t$SYSm, $Rn", []>,
4121 bits<12> SYSm;
4127 let Inst{11-10} = SYSm{11-10};
4129 let Inst{7-0} = SYSm{7-0};
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 4067 def t2MRS_M : T2I<(outs rGPR:$Rd), (ins msr_mask:$SYSm), NoItinerary,
4068 "mrs", "\t$Rd, $SYSm", []>,
4071 bits<8> SYSm;
4074 let Inst{7-0} = SYSm;
4126 def t2MSR_M : T2I<(outs), (ins msr_mask:$SYSm, rGPR:$Rn),
4127 NoItinerary, "msr", "\t$SYSm, $Rn", []>,
4129 bits<12> SYSm;
4135 let Inst{11-10} = SYSm{11-10};
4137 let Inst{7-0} = SYSm{7-0};
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| /external/capstone/arch/ARM/ |
| D | ARMInstPrinter.c | 1480 unsigned SYSm = (unsigned)MCOperand_getImm(Op); in printMSRMaskOperand() local
1485 SYSm &= 0xff; in printMSRMaskOperand()
1486 switch (SYSm) { in printMSRMaskOperand()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 3600 def t2MSR_M : T2I<(outs), (ins msr_mask:$SYSm, rGPR:$Rn),
3601 NoItinerary, "msr", "\t$SYSm, $Rn", []>,
3603 bits<8> SYSm;
3609 let Inst{7-0} = SYSm;
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenMCCodeEmitter.inc | 3827 // op: SYSm
4683 // op: SYSm
|