/external/swiftshader/third_party/LLVM/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.cpp | 249 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local 250 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand() 251 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand() 266 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO2.getImm()); in printSORegImmOperand() local 267 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegImmOperand() 268 if (ShOpc == ARM_AM::rrx) in printSORegImmOperand() 830 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO2.getImm()); in printT2SOOperand() local 831 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printT2SOOperand() 832 if (ShOpc != ARM_AM::rrx) in printT2SOOperand()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.cpp | 53 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument 55 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift() 59 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift() 60 O << getShiftOpcStr(ShOpc); in printRegImmShift() 62 if (ShOpc != ARM_AM::rrx) { in printRegImmShift() 364 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local 365 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand() 366 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
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/external/llvm/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.cpp | 44 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift() argument 46 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift() 50 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift() 51 O << getShiftOpcStr(ShOpc); in printRegImmShift() 53 if (ShOpc != ARM_AM::rrx) { in printRegImmShift() 352 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand() local 353 O << ", " << ARM_AM::getShiftOpcStr(ShOpc); in printSORegRegOperand() 354 if (ShOpc == ARM_AM::rrx) in printSORegRegOperand()
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/external/capstone/arch/ARM/ |
D | ARMInstPrinter.c | 179 static void printRegImmShift(MCInst *MI, SStream *O, ARM_AM_ShiftOpc ShOpc, unsigned ShImm) in printRegImmShift() argument 181 if (ShOpc == ARM_AM_no_shift || (ShOpc == ARM_AM_lsl && !ShImm)) in printRegImmShift() 186 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printRegImmShift() 189 …at_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = (arm_shifter)ShOpc; in printRegImmShift() 191 …nsn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = (arm_shifter)ShOpc; in printRegImmShift() 194 if (ShOpc != ARM_AM_rrx) { in printRegImmShift() 837 ARM_AM_ShiftOpc ShOpc; in printSORegRegOperand() local 850 ShOpc = ARM_AM_getSORegShOp((unsigned int)MCOperand_getImm(MO3)); in printSORegRegOperand() 852 SStream_concat0(O, ARM_AM_getShiftOpcStr(ShOpc)); in printSORegRegOperand() 853 if (ShOpc == ARM_AM_rrx) in printSORegRegOperand()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 178 unsigned getShiftOp(ARM_AM::ShiftOpc ShOpc) const { in getShiftOp() 179 switch (ShOpc) { in getShiftOp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 219 unsigned getShiftOp(ARM_AM::ShiftOpc ShOpc) const { in getShiftOp() 220 switch (ShOpc) { in getShiftOp()
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 205 unsigned getShiftOp(ARM_AM::ShiftOpc ShOpc) const { in getShiftOp() 206 switch (ShOpc) { in getShiftOp()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 176 ARM_AM::ShiftOpc ShOpc = ARM_AM::getAM2ShiftOpc(OffImm); in convertToThreeAddress() local 177 unsigned SOOpc = ARM_AM::getSORegOpc(ShOpc, Amt); in convertToThreeAddress()
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/external/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 175 ARM_AM::ShiftOpc ShOpc = ARM_AM::getAM2ShiftOpc(OffImm); in convertToThreeAddress() local 176 unsigned SOOpc = ARM_AM::getSORegOpc(ShOpc, Amt); in convertToThreeAddress()
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D | ARMISelDAGToDAG.cpp | 2371 SDValue ShOpc = in tryV6T2BitfieldExtractOp() local 2374 SDValue Ops[] = { N->getOperand(0).getOperand(0), ShOpc, in tryV6T2BitfieldExtractOp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 198 ARM_AM::ShiftOpc ShOpc = ARM_AM::getAM2ShiftOpc(OffImm); in convertToThreeAddress() local 199 unsigned SOOpc = ARM_AM::getSORegOpc(ShOpc, Amt); in convertToThreeAddress()
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D | ARMISelDAGToDAG.cpp | 2331 SDValue ShOpc = in tryV6T2BitfieldExtractOp() local 2334 SDValue Ops[] = { N->getOperand(0).getOperand(0), ShOpc, in tryV6T2BitfieldExtractOp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeDAG.cpp | 3927 unsigned ShOpc = IsLeft ? ISD::SHL : ISD::SRL; in ExpandNode() local 3936 DAG.getNode(ShOpc, dl, ResVT, Op0, And0), in ExpandNode()
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