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Searched refs:SignExtend64 (Results 1 – 25 of 59) sorted by relevance

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/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCExpr.cpp174 AbsVal = SignExtend64<16>(AbsVal); in evaluateAsRelocatableImpl()
178 AbsVal = SignExtend64<16>((AbsVal + 0x8000) >> 16); in evaluateAsRelocatableImpl()
181 AbsVal = SignExtend64<16>((AbsVal + 0x80008000LL) >> 32); in evaluateAsRelocatableImpl()
184 AbsVal = SignExtend64<16>((AbsVal + 0x800080008000LL) >> 48); in evaluateAsRelocatableImpl()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCExpr.cpp180 AbsVal = SignExtend64<16>(AbsVal); in evaluateAsRelocatableImpl()
184 AbsVal = SignExtend64<16>((AbsVal + 0x8000) >> 16); in evaluateAsRelocatableImpl()
187 AbsVal = SignExtend64<16>((AbsVal + 0x80008000LL) >> 32); in evaluateAsRelocatableImpl()
190 AbsVal = SignExtend64<16>((AbsVal + 0x800080008000LL) >> 48); in evaluateAsRelocatableImpl()
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonInstPrinter.cpp132 Imm = SignExtend64<9>(Imm); in prints3_6ImmOperand()
142 Imm = SignExtend64<10>(Imm); in prints3_7ImmOperand()
152 Imm = SignExtend64<10>(Imm); in prints4_6ImmOperand()
162 Imm = SignExtend64<11>(Imm); in prints4_7ImmOperand()
/external/capstone/arch/SystemZ/
DSystemZDisassembler.c106 MCOperand_CreateImm0(Inst, SignExtend64(Imm, N)); in decodeSImmOperand()
168 MCOperand_CreateImm0(Inst, SignExtend64(Imm, N) * 2 + Address); in decodePCDBLOperand()
206 MCOperand_CreateImm0(Inst, SignExtend64(Disp, 20)); in decodeBDAddr20Operand()
234 MCOperand_CreateImm0(Inst, SignExtend64(Disp, 20)); in decodeBDXAddr20Operand()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp675 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodeAddiGroupBranch()
712 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2 + 4; in DecodePOP35GroupBranchMMR6()
719 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodePOP35GroupBranchMMR6()
724 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2 + 4; in DecodePOP35GroupBranchMMR6()
748 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodeDaddiGroupBranch()
785 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2 + 4; in DecodePOP37GroupBranchMMR6()
792 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodePOP37GroupBranchMMR6()
797 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2 + 4; in DecodePOP37GroupBranchMMR6()
818 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodePOP65GroupBranchMMR6()
857 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodePOP75GroupBranchMMR6()
[all …]
/external/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/
DRuntimeDyldMachOAArch64.h77 Addend = SignExtend64(Addend, 28); in decodeAddend()
90 Addend = SignExtend64(Addend, 33); in decodeAddend()
270 ExplicitAddend = SignExtend64(RawAddend, 24); in processRelocationRef()
441 SignExtend64(readBytesUnaligned(LocalAddress, NumBytes), NumBytes * 8); in processSubtractRelocation()
/external/llvm/lib/Target/SystemZ/Disassembler/
DSystemZDisassembler.cpp165 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
241 uint64_t Value = SignExtend64<N>(Imm) * 2 + Address; in decodePCDBLOperand()
284 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand()
307 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/Disassembler/
DRISCVDisassembler.cpp219 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
231 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm << 1))); in decodeSImmOperandAndLsl1()
240 Imm = (SignExtend64<6>(Imm) & 0xfffff); in decodeCLUIImmOperand()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/
DRuntimeDyldMachOAArch64.h99 Addend = SignExtend64(Addend, 28); in decodeAddend()
112 Addend = SignExtend64(Addend, 33); in decodeAddend()
298 ExplicitAddend = SignExtend64(RawAddend, 24); in processRelocationRef()
501 SignExtend64(readBytesUnaligned(LocalAddress, NumBytes), NumBytes * 8); in processSubtractRelocation()
/external/capstone/arch/PowerPC/
DPPCDisassembler.c246 MCOperand_CreateImm0(Inst, SignExtend64(Imm, N)); in decodeSImmOperand()
287 MCOperand_CreateImm0(Inst, SignExtend64(Disp, 16)); in decodeMemRIOperands()
309 MCOperand_CreateImm0(Inst, SignExtend64(Disp << 2, 16)); in decodeMemRIXOperands()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/Disassembler/
DSystemZDisassembler.cpp183 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
253 uint64_t Value = SignExtend64<N>(Imm) * 2 + Address; in decodePCDBLOperand()
308 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand()
331 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand()
/external/capstone/arch/Mips/
DMipsDisassembler.c538 uint32_t Imm = (uint32_t)SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4; in DecodeAddiGroupBranch_4()
574 uint32_t Imm = (uint32_t)SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4; in DecodeDaddiGroupBranch_4()
611 uint32_t Imm = (uint32_t)SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4; in DecodeBlezlGroupBranch_4()
653 uint32_t Imm = (uint32_t)SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4; in DecodeBgtzlGroupBranch_4()
691 uint32_t Imm = (uint32_t)SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4; in DecodeBgtzGroupBranch_4()
737 uint32_t Imm = (uint32_t)SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4; in DecodeBlezGroupBranch_4()
1061 int64_t Offset = SignExtend64((Insn >> 7) & 0x1ff, 9); in DecodeSpecial3LlSc()
/external/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp311 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
345 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp))); in decodeMemRIOperands()
366 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 2))); in decodeMemRIXOperands()
381 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 4))); in decodeMemRIX16Operands()
/external/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp604 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodeAddiGroupBranch()
633 InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2; in DecodePOP35GroupBranchMMR6()
674 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodeDaddiGroupBranch()
703 InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2; in DecodePOP37GroupBranchMMR6()
745 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodeBlezlGroupBranch()
790 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodeBgtzlGroupBranch()
832 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodeBgtzGroupBranch()
881 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodeBlezGroupBranch()
1807 int64_t Offset = SignExtend64<9>((Insn >> 7) & 0x1ff); in DecodeSpecial3LlSc()
2288 InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2; in DecodeBgtzGroupBranchMMR6()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/MCTargetDesc/
DRISCVMCExpr.cpp116 return SignExtend64<12>(Value); in evaluateAsInt64()
/external/llvm/lib/Target/Mips/
DMips16RegisterInfo.cpp141 Offset = SignExtend64<16>(NewImm); in eliminateFI()
DMipsAnalyzeImmediate.cpp94 int64_t Imm = SignExtend64<16>(Seq[0].ImmOpnd); in ReplaceADDiuSLLWithLUi()
DMipsSERegisterInfo.cpp208 Offset = SignExtend64<16>(NewImm); in eliminateFI()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMips16RegisterInfo.cpp141 Offset = SignExtend64<16>(NewImm); in eliminateFI()
DMipsAnalyzeImmediate.cpp98 int64_t Imm = SignExtend64<16>(Seq[0].ImmOpnd); in ReplaceADDiuSLLWithLUi()
DMipsSERegisterInfo.cpp254 Offset = SignExtend64<16>(NewImm); in eliminateFI()
/external/llvm/lib/Target/Hexagon/Disassembler/
DHexagonDisassembler.cpp647 MI, SignExtend64<T>(tmp)); in signedDecoder()
648 int64_t Extended = SignExtend64<32>(FullValue); in signedDecoder()
686 HexagonMCInstrInfo::addConstant(MI, SignExtend64<12>(tmp), contextFromDecoder(Decoder)); in s11_1ImmDecoder()
766 MI, SignExtend64(tmp, Bits)); in brtargetDecoder()
767 int64_t Extended = SignExtend64<32>(FullValue) + Address; in brtargetDecoder()
1450 operand = SignExtend64<7>((inst & 0x7f0) >> 4); in addSubinstOperands()
1576 operand = SignExtend64<9>(((inst & 0x1f8) >> 3) << 3); in addSubinstOperands()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp368 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
402 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp))); in decodeMemRIOperands()
423 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 2))); in decodeMemRIXOperands()
438 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 4))); in decodeMemRIX16Operands()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/Disassembler/
DHexagonDisassembler.cpp90 int64_t FullValue = fullValue(Disassembler, MI, SignExtend64<T>(tmp)); in signedDecoder()
91 int64_t Extended = SignExtend64<32>(FullValue); in signedDecoder()
773 tmp = SignExtend64(tmp, Bits); in s32_0ImmDecoder()
786 uint64_t FullValue = fullValue(Disassembler, MI, SignExtend64(tmp, Bits)); in brtargetDecoder()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/AsmParser/
DRISCVAsmParser.cpp1123 int64_t Lo12 = SignExtend64<12>(Value); in emitLoadImm()
1168 int64_t Lo12 = SignExtend64<12>(Value); in emitLoadImm()
1171 Hi52 = SignExtend64(Hi52 >> (ShiftAmount - 12), 64 - ShiftAmount); in emitLoadImm()
1198 Imm = SignExtend64<32>(Imm); in processInstruction()

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