Searched refs:SrcRegS (Results 1 – 3 of 3) sorted by relevance
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 1010 unsigned SrcRegS = MI->getOperand(1).getReg(); in expandPostRAPseudo() local 1011 if (!ARM::SPRRegClass.contains(DstRegS, SrcRegS)) in expandPostRAPseudo() 1017 unsigned SrcRegD = TRI->getMatchingSuperReg(SrcRegS, ARM::ssub_0, in expandPostRAPseudo() 1052 MachineInstrBuilder(MI).addReg(SrcRegS, RegState::Implicit); in expandPostRAPseudo() 1058 MI->addRegisterKilled(SrcRegS, TRI, true); in expandPostRAPseudo()
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/external/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 1305 unsigned SrcRegS = MI.getOperand(1).getReg(); in expandPostRAPseudo() local 1306 if (!ARM::SPRRegClass.contains(DstRegS, SrcRegS)) in expandPostRAPseudo() 1312 unsigned SrcRegD = TRI->getMatchingSuperReg(SrcRegS, ARM::ssub_0, in expandPostRAPseudo() 1348 MIB.addReg(SrcRegS, RegState::Implicit); in expandPostRAPseudo() 1354 MI.addRegisterKilled(SrcRegS, TRI, true); in expandPostRAPseudo()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 1474 unsigned SrcRegS = MI.getOperand(1).getReg(); in expandPostRAPseudo() local 1475 if (!ARM::SPRRegClass.contains(DstRegS, SrcRegS)) in expandPostRAPseudo() 1481 unsigned SrcRegD = TRI->getMatchingSuperReg(SrcRegS, ARM::ssub_0, in expandPostRAPseudo() 1517 MIB.addReg(SrcRegS, RegState::Implicit); in expandPostRAPseudo() 1523 MI.addRegisterKilled(SrcRegS, TRI, true); in expandPostRAPseudo()
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