Searched refs:SrlImm (Results 1 – 2 of 2) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1525 uint64_t SrlImm = 0; in isBitfieldExtractOpFromAnd() local
1528 isOpcWithIntImmediate(Op0->getOperand(0).getNode(), ISD::SRL, SrlImm)) { in isBitfieldExtractOpFromAnd()
1536 SrlImm)) { in isBitfieldExtractOpFromAnd()
1542 } else if (isOpcWithIntImmediate(Op0, ISD::SRL, SrlImm)) { in isBitfieldExtractOpFromAnd()
1556 if (!BiggerPattern && (SrlImm <= 0 || SrlImm >= VT.getSizeInBits())) { in isBitfieldExtractOpFromAnd()
1563 LSB = SrlImm; in isBitfieldExtractOpFromAnd()
1564 MSB = SrlImm + (VT == MVT::i32 ? countTrailingOnes<uint32_t>(AndImm) in isBitfieldExtractOpFromAnd()
1637 uint64_t SrlImm = 0; in isSeveralBitsExtractOpFromShr() local
1638 if (!isIntImmediate(N->getOperand(1), SrlImm)) in isSeveralBitsExtractOpFromShr()
1642 unsigned BitWide = 64 - countLeadingOnes(~(AndMask >> SrlImm)); in isSeveralBitsExtractOpFromShr()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1457 uint64_t SrlImm = 0; in isBitfieldExtractOpFromAnd() local
1460 isOpcWithIntImmediate(Op0->getOperand(0).getNode(), ISD::SRL, SrlImm)) { in isBitfieldExtractOpFromAnd()
1468 SrlImm)) { in isBitfieldExtractOpFromAnd()
1474 } else if (isOpcWithIntImmediate(Op0, ISD::SRL, SrlImm)) { in isBitfieldExtractOpFromAnd()
1488 if (!BiggerPattern && (SrlImm <= 0 || SrlImm >= VT.getSizeInBits())) { in isBitfieldExtractOpFromAnd()
1494 LSB = SrlImm; in isBitfieldExtractOpFromAnd()
1495 MSB = SrlImm + (VT == MVT::i32 ? countTrailingOnes<uint32_t>(AndImm) in isBitfieldExtractOpFromAnd()
1568 uint64_t SrlImm = 0; in isSeveralBitsExtractOpFromShr() local
1569 if (!isIntImmediate(N->getOperand(1), SrlImm)) in isSeveralBitsExtractOpFromShr()
1573 unsigned BitWide = 64 - countLeadingOnes(~(AndMask >> SrlImm)); in isSeveralBitsExtractOpFromShr()
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