Searched refs:TGSI_OPCODE_DRSQ (Results 1 – 10 of 10) sorted by relevance
| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| D | tgsi_info.c | 259 { 1, 1, 0, 0 ,0, 0, COMP, "DRSQ", TGSI_OPCODE_DRSQ },
401 case TGSI_OPCODE_DRSQ: in tgsi_opcode_infer_type()
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_info.c | 204 case TGSI_OPCODE_DRSQ: in tgsi_opcode_infer_type()
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| D | tgsi_exec.c | 5884 case TGSI_OPCODE_DRSQ: in exec_instruction()
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| /external/virglrenderer/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 565 #define TGSI_OPCODE_DRSQ 217 /* eg, cayman also has DRSQ */ macro
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| /external/mesa3d/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 571 #define TGSI_OPCODE_DRSQ 217 /* eg, cayman also has DRSQ */ macro
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_shader_tgsi_alu.c | 744 bld_base->op_actions[TGSI_OPCODE_DRSQ].emit = build_tgsi_intrinsic_nomem; in si_shader_context_init_alu()
745 bld_base->op_actions[TGSI_OPCODE_DRSQ].intr_name = "llvm.amdgcn.rsq.f64"; in si_shader_context_init_alu()
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| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_from_tgsi.cpp | 657 case TGSI_OPCODE_DRSQ: in inferSrcType()
4014 case TGSI_OPCODE_DRSQ: in handleInstruction()
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_tgsi_action.c | 2482 bld_base->op_actions[TGSI_OPCODE_DRSQ].emit = drecip_sqrt_emit_cpu; in lp_set_default_actions_cpu()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_shader.c | 4537 ctx->parse.FullToken.FullInstruction.Instruction.Opcode == TGSI_OPCODE_DRSQ || in cayman_emit_double_instr()
10666 [TGSI_OPCODE_DRSQ] = { ALU_OP2_RECIPSQRT_64, cayman_emit_double_instr},
10888 [TGSI_OPCODE_DRSQ] = { ALU_OP2_RECIPSQRT_64, cayman_emit_double_instr},
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| /external/virglrenderer/src/ |
| D | vrend_shader.c | 3492 case TGSI_OPCODE_DRSQ: in iter_instruction()
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