Searched refs:TGSI_OPCODE_POW (Results 1 – 24 of 24) sorted by relevance
| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| D | tgsi_util.c | 201 case TGSI_OPCODE_POW: in tgsi_util_get_inst_usage_mask()
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| D | tgsi_info.c | 70 { 1, 2, 0, 0, 0, 0, REPL, "POW", TGSI_OPCODE_POW },
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_util.c | 193 case TGSI_OPCODE_POW: /* reads src0.x and src1.x */ in tgsi_util_get_inst_usage_mask()
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| D | tgsi_lowering.c | 1355 case TGSI_OPCODE_POW: in transform_instr()
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| D | tgsi_exec.c | 5128 case TGSI_OPCODE_POW: in exec_instruction()
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| /external/virglrenderer/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 361 #define TGSI_OPCODE_POW 30 macro
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| /external/mesa3d/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 372 #define TGSI_OPCODE_POW 30 macro
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| /external/mesa3d/src/gallium/drivers/r300/ |
| D | r300_tgsi_to_rc.c | 59 case TGSI_OPCODE_POW: return RC_OPCODE_POW; in translate_opcode()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_shader_tgsi_alu.c | 799 bld_base->op_actions[TGSI_OPCODE_POW].emit = build_tgsi_intrinsic_nomem; in si_shader_context_init_alu()
800 bld_base->op_actions[TGSI_OPCODE_POW].intr_name = "llvm.pow.f32"; in si_shader_context_init_alu()
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_tgsi_action.c | 416 tmp1 = lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_POW, in lit_emit()
1172 bld_base->op_actions[TGSI_OPCODE_POW] = pow_action; in lp_set_default_actions()
2444 bld_base->op_actions[TGSI_OPCODE_POW].emit = pow_emit_cpu; in lp_set_default_actions_cpu()
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| D | lp_bld_tgsi_aos.c | 585 case TGSI_OPCODE_POW: in lp_emit_instruction_aos()
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| /external/mesa3d/src/gallium/drivers/i915/ |
| D | i915_fpc_optimize.c | 104 [ TGSI_OPCODE_POW ] = { false, false, 0, 1, 2 },
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| D | i915_fpc_translate.c | 745 case TGSI_OPCODE_POW: in i915_translate_instruction()
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_mesa_to_tgsi.c | 486 return TGSI_OPCODE_POW; in translate_opcode()
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| D | st_glsl_to_tgsi.cpp | 1859 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]); in visit_expression()
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| /external/mesa3d/src/gallium/auxiliary/nir/ |
| D | tgsi_to_nir.c | 1498 [TGSI_OPCODE_POW] = nir_op_fpow,
1673 case TGSI_OPCODE_POW: in ttn_emit_instruction()
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| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | fd2_compiler.c | 1080 case TGSI_OPCODE_POW: in translate_instruction()
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| /external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| D | nvfx_vertprog.c | 637 case TGSI_OPCODE_POW: in nvfx_vertprog_parse_instruction()
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| D | nvfx_fragprog.c | 668 case TGSI_OPCODE_POW: in nvfx_fragprog_parse_instruction()
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| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_from_tgsi.cpp | 304 case TGSI_OPCODE_POW: in srcMask()
3302 case TGSI_OPCODE_POW: in handleInstruction()
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_tgsi_insn.c | 2848 case TGSI_OPCODE_POW: in svga_emit_instruction()
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| D | svga_tgsi_vgpu10.c | 5544 case TGSI_OPCODE_POW: in emit_vgpu10_instruction()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_shader.c | 10280 [TGSI_OPCODE_POW] = { ALU_OP0_NOP, tgsi_pow},
10478 [TGSI_OPCODE_POW] = { ALU_OP0_NOP, tgsi_pow},
10700 [TGSI_OPCODE_POW] = { ALU_OP0_NOP, cayman_pow},
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| /external/virglrenderer/src/ |
| D | vrend_shader.c | 3701 case TGSI_OPCODE_POW: in iter_instruction()
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