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Searched refs:TIMING_CFG0_RWT_SHIFT (Results 1 – 16 of 16) sorted by relevance

/external/u-boot/include/configs/km/
Dkm8321-common.h96 (0 << TIMING_CFG0_RWT_SHIFT))
Dkm8309-common.h132 (0 << TIMING_CFG0_RWT_SHIFT))
/external/u-boot/include/configs/
Dkm8360.h119 (0 << TIMING_CFG0_RWT_SHIFT))
Dmpc8308_p1m.h144 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \
DMPC8308RDB.h142 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \
DMPC8323ERDB.h90 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \
Dve8313.h66 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \
Dids8313.h115 #define CONFIG_SYS_DDR_TIMING_0 ((3 << TIMING_CFG0_RWT_SHIFT) |\
DMPC832XEMDS.h100 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \
DMPC8315ERDB.h115 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \
DMPC837XEMDS.h140 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \
Dhrcon.h131 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \
Dstrider.h131 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \
DMPC837XERDB.h154 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \
DMPC8313ERDB.h129 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \
/external/u-boot/include/
Dmpc83xx.h1157 #define TIMING_CFG0_RWT_SHIFT 30 macro