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Searched refs:TRESET_CNTR2_VAL (Results 1 – 12 of 12) sorted by relevance

/external/u-boot/board/altera/cyclone5-socdk/qts/
Dsdram_config.h170 #define TRESET_CNTR2_VAL 10 macro
/external/u-boot/board/terasic/de1-soc/qts/
Dsdram_config.h170 #define TRESET_CNTR2_VAL 10 macro
/external/u-boot/board/terasic/de10-nano/qts/
Dsdram_config.h170 #define TRESET_CNTR2_VAL 10 macro
/external/u-boot/board/samtec/vining_fpga/qts/
Dsdram_config.h170 #define TRESET_CNTR2_VAL 10 macro
/external/u-boot/board/devboards/dbm-soc1/qts/
Dsdram_config.h170 #define TRESET_CNTR2_VAL 10 macro
/external/u-boot/board/altera/arria5-socdk/qts/
Dsdram_config.h170 #define TRESET_CNTR2_VAL 10 macro
/external/u-boot/board/terasic/sockit/qts/
Dsdram_config.h170 #define TRESET_CNTR2_VAL 10 macro
/external/u-boot/board/sr1500/qts/
Dsdram_config.h170 #define TRESET_CNTR2_VAL 10 macro
/external/u-boot/board/ebv/socrates/qts/
Dsdram_config.h170 #define TRESET_CNTR2_VAL 10 macro
/external/u-boot/board/is1/qts/
Dsdram_config.h170 #define TRESET_CNTR2_VAL 10 macro
/external/u-boot/board/terasic/de0-nano-soc/qts/
Dsdram_config.h172 #define TRESET_CNTR2_VAL 10 macro
/external/u-boot/arch/arm/mach-socfpga/
Dwrap_sdram_config.c285 .treset_cntr2_val = TRESET_CNTR2_VAL,