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Searched refs:TheReg (Results 1 – 7 of 7) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/InstPrinter/
DARMInstPrinter.cpp812 auto TheReg =ARMSysReg::lookupMClassSysRegBy12bitSYSmValue(SYSm); in printMSRMaskOperand() local
813 if (TheReg && TheReg->isInRequiredFeatures({ARM::FeatureDSP})) { in printMSRMaskOperand()
814 O << TheReg->Name; in printMSRMaskOperand()
824 auto TheReg = ARMSysReg::lookupMClassSysRegAPSRNonDeprecated(SYSm); in printMSRMaskOperand() local
825 if (TheReg) { in printMSRMaskOperand()
826 O << TheReg->Name; in printMSRMaskOperand()
831 auto TheReg = ARMSysReg::lookupMClassSysRegBy8bitSYSmValue(SYSm); in printMSRMaskOperand() local
832 if (TheReg) { in printMSRMaskOperand()
833 O << TheReg->Name; in printMSRMaskOperand()
886 auto TheReg = ARMBankedReg::lookupBankedRegByEncoding(Banked); in printBankedRegOperand() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp2645 auto TheReg = AArch64SysReg::lookupSysRegByName(RegString->getString()); in tryReadRegister() local
2646 if (TheReg && TheReg->Readable && in tryReadRegister()
2647 TheReg->haveFeatures(Subtarget->getFeatureBits())) in tryReadRegister()
2648 Reg = TheReg->Encoding; in tryReadRegister()
2711 auto TheReg = AArch64SysReg::lookupSysRegByName(RegString->getString()); in tryWriteRegister() local
2712 if (TheReg && TheReg->Writeable && in tryWriteRegister()
2713 TheReg->haveFeatures(Subtarget->getFeatureBits())) in tryWriteRegister()
2714 Reg = TheReg->Encoding; in tryWriteRegister()
/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp2441 auto TheReg = AArch64SysReg::lookupSysRegByName(RegString->getString()); in tryReadRegister() local
2442 if (TheReg && TheReg->Readable && in tryReadRegister()
2443 TheReg->haveFeatures(Subtarget->getFeatureBits())) in tryReadRegister()
2444 Reg = TheReg->Encoding; in tryReadRegister()
2507 auto TheReg = AArch64SysReg::lookupSysRegByName(RegString->getString()); in tryWriteRegister() local
2508 if (TheReg && TheReg->Writeable && in tryWriteRegister()
2509 TheReg->haveFeatures(Subtarget->getFeatureBits())) in tryWriteRegister()
2510 Reg = TheReg->Encoding; in tryWriteRegister()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp3825 auto TheReg = ARMBankedReg::lookupBankedRegByName(RegString.lower()); in getBankedRegisterMask() local
3826 if (!TheReg) in getBankedRegisterMask()
3828 return TheReg->Encoding; in getBankedRegisterMask()
3848 auto TheReg = ARMSysReg::lookupMClassSysRegByName(Reg); in getMClassRegisterMask() local
3850 if (!TheReg || !TheReg->hasRequiredFeatures(FeatureBits)) in getMClassRegisterMask()
3852 return (int)(TheReg->Encoding & 0xFFF); // SYSm value in getMClassRegisterMask()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp4366 auto TheReg = ARMSysReg::lookupMClassSysRegByName(Mask.lower()); in parseMSRMaskOperand() local
4367 if (!TheReg || !TheReg->hasRequiredFeatures(getSTI().getFeatureBits())) in parseMSRMaskOperand()
4370 unsigned SYSmvalue = TheReg->Encoding & 0xFFF; in parseMSRMaskOperand()
4451 auto TheReg = ARMBankedReg::lookupBankedRegByName(RegName.lower()); in parseBankedRegOperand() local
4452 if (!TheReg) in parseBankedRegOperand()
4454 unsigned Encoding = TheReg->Encoding; in parseBankedRegOperand()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp831 unsigned TheReg = Regs[Reg++]; in AddInlineAsmOperands() local
832 Ops.push_back(DAG.getRegister(TheReg, RegisterVT)); in AddInlineAsmOperands()
834 if (TheReg == SP && Code == InlineAsm::Kind_Clobber) { in AddInlineAsmOperands()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp965 unsigned TheReg = Regs[Reg++]; in AddInlineAsmOperands() local
966 Ops.push_back(DAG.getRegister(TheReg, RegisterVT)); in AddInlineAsmOperands()