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Searched refs:Tmp2Reg (Results 1 – 3 of 3) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCISelLowering.cpp4757 unsigned Tmp2Reg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
4822 BuildMI(BB, dl, TII->get(is64bit ? PPC::ANDC8 : PPC::ANDC), Tmp2Reg) in EmitPartwordAtomicBinary()
4827 .addReg(Tmp3Reg).addReg(Tmp2Reg); in EmitPartwordAtomicBinary()
5082 unsigned Tmp2Reg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
5168 BuildMI(BB, dl, TII->get(PPC::ANDC),Tmp2Reg) in EmitInstrWithCustomInserter()
5171 .addReg(Tmp2Reg).addReg(NewVal3Reg); in EmitInstrWithCustomInserter()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp8548 unsigned Tmp2Reg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
8613 BuildMI(BB, dl, TII->get(is64bit ? PPC::ANDC8 : PPC::ANDC), Tmp2Reg) in EmitPartwordAtomicBinary()
8618 .addReg(Tmp3Reg).addReg(Tmp2Reg); in EmitPartwordAtomicBinary()
9266 unsigned Tmp2Reg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
9352 BuildMI(BB, dl, TII->get(PPC::ANDC),Tmp2Reg) in EmitInstrWithCustomInserter()
9355 .addReg(Tmp2Reg).addReg(NewVal3Reg); in EmitInstrWithCustomInserter()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp9845 unsigned Tmp2Reg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
9911 BuildMI(BB, dl, TII->get(is64bit ? PPC::ANDC8 : PPC::ANDC), Tmp2Reg) in EmitPartwordAtomicBinary()
9942 .addReg(Tmp3Reg).addReg(Tmp2Reg); in EmitPartwordAtomicBinary()
10635 unsigned Tmp2Reg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
10722 BuildMI(BB, dl, TII->get(PPC::ANDC),Tmp2Reg) in EmitInstrWithCustomInserter()
10725 .addReg(Tmp2Reg).addReg(NewVal3Reg); in EmitInstrWithCustomInserter()