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Searched refs:Tmp5 (Results 1 – 12 of 12) sorted by relevance

/external/llvm/lib/CodeGen/
DIntrinsicLowering.cpp210 Value *Tmp5 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
231 Tmp5 = Builder.CreateAnd(Tmp5, in LowerBSWAP()
248 Tmp6 = Builder.CreateOr(Tmp6, Tmp5, "bswap.or2"); in LowerBSWAP()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DIntrinsicLowering.cpp210 Value *Tmp5 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
231 Tmp5 = Builder.CreateAnd(Tmp5, in LowerBSWAP()
248 Tmp6 = Builder.CreateOr(Tmp6, Tmp5, "bswap.or2"); in LowerBSWAP()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DIntrinsicLowering.cpp209 Value *Tmp5 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
230 Tmp5 = Builder.CreateAnd(Tmp5, in LowerBSWAP()
247 Tmp6 = Builder.CreateOr(Tmp6, Tmp5, "bswap.or2"); in LowerBSWAP()
/external/llvm/lib/Transforms/Utils/
DIntegerDivision.cpp310 Value *Tmp5 = Builder.CreateShl(R_1, One); in generateUnsignedDivisionCode() local
312 Value *Tmp7 = Builder.CreateOr(Tmp5, Tmp6); in generateUnsignedDivisionCode()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/
DIntegerDivision.cpp310 Value *Tmp5 = Builder.CreateShl(R_1, One); in generateUnsignedDivisionCode() local
312 Value *Tmp7 = Builder.CreateOr(Tmp5, Tmp6); in generateUnsignedDivisionCode()
/external/clang/lib/CodeGen/
DCGExprComplex.cpp785 llvm::Value *Tmp5 = Builder.CreateMul(RHSi, RHSi); // d*d in EmitBinDiv() local
786 llvm::Value *Tmp6 = Builder.CreateAdd(Tmp4, Tmp5); // cc+dd in EmitBinDiv()
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCISelLowering.cpp3814 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSHL_PARTS() local
3816 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5); in LowerSHL_PARTS()
3843 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRL_PARTS() local
3845 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5); in LowerSRL_PARTS()
3871 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRA_PARTS() local
3873 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5); in LowerSRA_PARTS()
3875 SDValue OutLo = DAG.getSelectCC(dl, Tmp5, DAG.getConstant(0, AmtVT), in LowerSRA_PARTS()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp2732 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
2753 Tmp5 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(8, SHVT)); in ExpandBSWAP()
2760 Tmp5 = DAG.getNode(ISD::AND, dl, VT, Tmp5, DAG.getConstant(255ULL<<32, VT)); in ExpandBSWAP()
2765 Tmp6 = DAG.getNode(ISD::OR, dl, VT, Tmp6, Tmp5); in ExpandBSWAP()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp2583 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
2605 Tmp5 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(8, dl, SHVT)); in ExpandBSWAP()
2614 Tmp5 = DAG.getNode(ISD::AND, dl, VT, Tmp5, in ExpandBSWAP()
2623 Tmp6 = DAG.getNode(ISD::OR, dl, VT, Tmp6, Tmp5); in ExpandBSWAP()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp2659 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
2681 Tmp5 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(8, dl, SHVT)); in ExpandBSWAP()
2690 Tmp5 = DAG.getNode(ISD::AND, dl, VT, Tmp5, in ExpandBSWAP()
2699 Tmp6 = DAG.getNode(ISD::OR, dl, VT, Tmp6, Tmp5); in ExpandBSWAP()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp6944 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSHL_PARTS() local
6946 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5); in LowerSHL_PARTS()
6973 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRL_PARTS() local
6975 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5); in LowerSRL_PARTS()
7001 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRA_PARTS() local
7003 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5); in LowerSRA_PARTS()
7005 SDValue OutLo = DAG.getSelectCC(dl, Tmp5, DAG.getConstant(0, dl, AmtVT), in LowerSRA_PARTS()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp7565 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSHL_PARTS() local
7567 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5); in LowerSHL_PARTS()
7594 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRL_PARTS() local
7596 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5); in LowerSRL_PARTS()
7622 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRA_PARTS() local
7624 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5); in LowerSRA_PARTS()
7626 SDValue OutLo = DAG.getSelectCC(dl, Tmp5, DAG.getConstant(0, dl, AmtVT), in LowerSRA_PARTS()