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Searched refs:Tmp6 (Results 1 – 12 of 12) sorted by relevance

/external/llvm/lib/CodeGen/
DIntrinsicLowering.cpp208 Value *Tmp6 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
227 Tmp6 = Builder.CreateAnd(Tmp6, in LowerBSWAP()
248 Tmp6 = Builder.CreateOr(Tmp6, Tmp5, "bswap.or2"); in LowerBSWAP()
251 Tmp8 = Builder.CreateOr(Tmp8, Tmp6, "bswap.or5"); in LowerBSWAP()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DIntrinsicLowering.cpp208 Value *Tmp6 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
227 Tmp6 = Builder.CreateAnd(Tmp6, in LowerBSWAP()
248 Tmp6 = Builder.CreateOr(Tmp6, Tmp5, "bswap.or2"); in LowerBSWAP()
251 Tmp8 = Builder.CreateOr(Tmp8, Tmp6, "bswap.or5"); in LowerBSWAP()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DIntrinsicLowering.cpp207 Value *Tmp6 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
226 Tmp6 = Builder.CreateAnd(Tmp6, in LowerBSWAP()
247 Tmp6 = Builder.CreateOr(Tmp6, Tmp5, "bswap.or2"); in LowerBSWAP()
250 Tmp8 = Builder.CreateOr(Tmp8, Tmp6, "bswap.or5"); in LowerBSWAP()
/external/clang/lib/CodeGen/
DCGExprComplex.cpp786 llvm::Value *Tmp6 = Builder.CreateAdd(Tmp4, Tmp5); // cc+dd in EmitBinDiv() local
793 DSTr = Builder.CreateUDiv(Tmp3, Tmp6); in EmitBinDiv()
794 DSTi = Builder.CreateUDiv(Tmp9, Tmp6); in EmitBinDiv()
796 DSTr = Builder.CreateSDiv(Tmp3, Tmp6); in EmitBinDiv()
797 DSTi = Builder.CreateSDiv(Tmp9, Tmp6); in EmitBinDiv()
/external/llvm/lib/Transforms/Utils/
DIntegerDivision.cpp311 Value *Tmp6 = Builder.CreateLShr(Q_2, MSB); in generateUnsignedDivisionCode() local
312 Value *Tmp7 = Builder.CreateOr(Tmp5, Tmp6); in generateUnsignedDivisionCode()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/
DIntegerDivision.cpp311 Value *Tmp6 = Builder.CreateLShr(Q_2, MSB); in generateUnsignedDivisionCode() local
312 Value *Tmp7 = Builder.CreateOr(Tmp5, Tmp6); in generateUnsignedDivisionCode()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp2732 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
2752 Tmp6 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(24, SHVT)); in ExpandBSWAP()
2759 Tmp6 = DAG.getNode(ISD::AND, dl, VT, Tmp6, DAG.getConstant(255ULL<<40, VT)); in ExpandBSWAP()
2765 Tmp6 = DAG.getNode(ISD::OR, dl, VT, Tmp6, Tmp5); in ExpandBSWAP()
2768 Tmp8 = DAG.getNode(ISD::OR, dl, VT, Tmp8, Tmp6); in ExpandBSWAP()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp2583 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
2604 Tmp6 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(24, dl, SHVT)); in ExpandBSWAP()
2612 Tmp6 = DAG.getNode(ISD::AND, dl, VT, Tmp6, in ExpandBSWAP()
2623 Tmp6 = DAG.getNode(ISD::OR, dl, VT, Tmp6, Tmp5); in ExpandBSWAP()
2626 Tmp8 = DAG.getNode(ISD::OR, dl, VT, Tmp8, Tmp6); in ExpandBSWAP()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp2659 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
2680 Tmp6 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(24, dl, SHVT)); in ExpandBSWAP()
2688 Tmp6 = DAG.getNode(ISD::AND, dl, VT, Tmp6, in ExpandBSWAP()
2699 Tmp6 = DAG.getNode(ISD::OR, dl, VT, Tmp6, Tmp5); in ExpandBSWAP()
2702 Tmp8 = DAG.getNode(ISD::OR, dl, VT, Tmp8, Tmp6); in ExpandBSWAP()
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCISelLowering.cpp3816 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5); in LowerSHL_PARTS() local
3817 SDValue OutHi = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6); in LowerSHL_PARTS()
3845 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5); in LowerSRL_PARTS() local
3846 SDValue OutLo = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6); in LowerSRL_PARTS()
3873 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5); in LowerSRA_PARTS() local
3876 Tmp4, Tmp6, ISD::SETLE); in LowerSRA_PARTS()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp6946 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5); in LowerSHL_PARTS() local
6947 SDValue OutHi = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6); in LowerSHL_PARTS()
6975 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5); in LowerSRL_PARTS() local
6976 SDValue OutLo = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6); in LowerSRL_PARTS()
7003 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5); in LowerSRA_PARTS() local
7006 Tmp4, Tmp6, ISD::SETLE); in LowerSRA_PARTS()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp7567 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5); in LowerSHL_PARTS() local
7568 SDValue OutHi = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6); in LowerSHL_PARTS()
7596 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5); in LowerSRL_PARTS() local
7597 SDValue OutLo = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6); in LowerSRL_PARTS()
7624 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5); in LowerSRA_PARTS() local
7627 Tmp4, Tmp6, ISD::SETLE); in LowerSRA_PARTS()