/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | usat.ll | 5 ; Check for several conditions that should result in USAT. 9 ; transformed into USAT. At the end there are some tests 65 ; of the possible combinations that lead to USAT are tested. 139 ; into USAT but are similar enough that could confuse the selector.
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/external/libhevc/common/arm/ |
D | ihevc_sao_edge_offset_class3_chroma.s | 159 …USAT r9,#8,r9 @u1_pos_0_0_tmp_u = CLIP3(pu1_src[wd - 2] + pi1_sao_offset… 188 …USAT r10,#8,r10 @u1_pos_0_0_tmp_v = CLIP3(pu1_src[wd - 1] + pi1_sao_offset… 229 …USAT r10,#8,r10 @u1_pos_wd_ht_tmp = CLIP3(pu1_src[(ht - 1) * src_strd] + p… 260 …USAT r9,#8,r9 @u1_pos_wd_ht_tmp_v = CLIP3(pu1_src[(ht - 1) * src_strd] +…
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D | ihevc_sao_edge_offset_class2_chroma.s | 163 …USAT r9,#8,r9 @u1_pos_0_0_tmp_u = CLIP3(pu1_src[0] + pi1_sao_offset[edge… 194 …USAT r10,#8,r10 @u1_pos_0_0_tmp_v = CLIP3(pu1_src[0] + pi1_sao_offset_v[ed… 237 …USAT r10,#8,r10 @u1_pos_wd_ht_tmp = CLIP3(pu1_src[wd - 1 + (ht - 1) * src_… 269 …USAT r9,#8,r9 @u1_pos_wd_ht_tmp_v = CLIP3(pu1_src[wd - 1 + (ht - 1) * sr…
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D | ihevc_sao_edge_offset_class3.s | 152 …USAT r9,#8,r9 @u1_pos_0_0_tmp = CLIP3(pu1_src[0] + pi1_sao_offset[edge_i… 195 …USAT r10,#8,r10 @u1_pos_wd_ht_tmp = CLIP3(pu1_src[(ht - 1) * src_strd] + p…
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D | ihevc_sao_edge_offset_class2.s | 149 …USAT r9,#8,r9 @u1_pos_0_0_tmp = CLIP3(pu1_src[0] + pi1_sao_offset[edge_i… 186 …USAT r10,#8,r10 @u1_pos_wd_ht_tmp = CLIP3(pu1_src[wd - 1 + (ht - 1) * src_…
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.h | 90 USAT, // Unsigned saturation enumerator
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D | ARMScheduleA57.td | 342 // Saturate: SSAT, SSAT16, USAT, USAT16 344 (instregex "(t2)?SSAT(16)?", "(t2)?USAT(16)?")>;
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D | ARMInstrInfo.td | 150 def ARMusatnoshift : SDNode<"ARMISD::USAT", SDTIntSatNoShOp, []>; 3828 def USAT : AI<(outs GPRnopc:$Rd), 3862 (USAT imm0_31:$pos, GPRnopc:$a, 0)>; 3866 (USAT imm0_31:$imm, GPRnopc:$Rn, 0)>; 5933 // SSAT/USAT optional shift operand. 5937 (USAT GPRnopc:$Rd, imm0_31:$sat_imm, GPRnopc:$Rn, 0, pred:$p)>;
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D | ARMScheduleSwift.td | 193 (instregex "QADD", "QSUB", "QDADD", "QDSUB", "SSAT", "SSAT16", "USAT",
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D | ARMScheduleR52.td | 234 (instregex "QADD", "QSUB", "QDADD", "QDSUB", "SSAT", "SSAT16", "USAT",
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/external/llvm/lib/Target/ARM/ |
D | ARMScheduleSwift.td | 188 (instregex "QADD", "QSUB", "QDADD", "QDSUB", "SSAT", "SSAT16", "USAT",
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D | ARMInstrInfo.td | 3680 def USAT : AI<(outs GPRnopc:$Rd), 3712 (USAT imm0_31:$pos, GPRnopc:$a, 0)>; 5633 // SSAT/USAT optional shift operand. 5637 (USAT GPRnopc:$Rd, imm0_31:$sat_imm, GPRnopc:$Rn, 0, pred:$p)>;
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrInfo.td | 3279 def USAT : AI<(outs GPRnopc:$Rd), 3311 (USAT imm:$pos, GPRnopc:$a, 0)>; 4923 // SSAT/USAT optional shift operand. 4927 (USAT GPRnopc:$Rd, imm0_31:$sat_imm, GPRnopc:$Rn, 0, pred:$p)>;
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmWriter.inc | 1451 548098U, // USAT 4671 14680064U, // USAT 8951 // USAT, t2USAT
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D | ARMGenMCCodeEmitter.inc | 944 UINT64_C(115343376), // USAT 9867 case ARM::USAT: { 12217 Feature_IsARM | Feature_HasV6 | 0, // USAT = 931
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/external/capstone/arch/ARM/ |
D | ARMGenAsmWriter.inc | 523 31263U, // USAT 3316 7340032U, // USAT 8006 // USAT, t2USAT 9242 // (USAT GPRnopc:$Rd, imm0_31:$sat_imm, GPRnopc:$Rn, 0, pred:$p)
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 2206 # USAT
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D | thumb2.txt | 2365 # USAT
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 2516 # USAT
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D | basic-arm-instructions.txt | 2379 # USAT
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 2379 # USAT
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D | thumb2.txt | 2516 # USAT
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 2468 @ USAT
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D | basic-thumb2-instructions.s | 3018 @ USAT
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 3571 @ USAT
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