| /external/llvm/test/CodeGen/ARM/ |
| D | fabs-to-bfc.ll | 1 …: llc < %s -mtriple=armv5e-none-linux-gnueabi -mattr=+vfp2 | FileCheck %s -check-prefix=CHECK-VABS
9 ;CHECK-VABS: vabs.f64
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | fabs-to-bfc.ll | 1 …: llc < %s -mtriple=armv5e-none-linux-gnueabi -mattr=+vfp2 | FileCheck %s -check-prefix=CHECK-VABS
9 ;CHECK-VABS: vabs.f64
|
| D | fp16-instructions.ll | 46 ; 1. VABS: TODO
|
| /external/libxaac/decoder/armv7/ |
| D | ixheaacd_calcmaxspectralline.s | 38 VABS.S32 Q0, Q0
41 VABS.S32 Q1, Q1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMScheduleR52.td | 525 def : InstRW<[R52WriteFPALU_F5, R52Read_F1], (instregex "VABS(D|S|H)")>;
526 def : InstRW<[R52WriteFPALU_F5, R52Read_F1], (instregex "VABS(fd|hd)")>;
527 def : InstRW<[R52Write2FPALU_F5, R52Read_F1], (instregex "VABS(fq|hq)")>;
773 def : InstRW<[R52Write2FPALU_F4, R52Read_F1], (instregex "VABS(v16i8|v8i16|v4i32)")>;
|
| D | ARMScheduleSwift.td | 573 "VQRSHL", "VRSHR(u|s)", "VABS(f|v)", "VQABS", "VQNEG", "VQADD",
604 def : InstRW<[SwiftWriteP0TwoCycle], (instregex "VABS(S|D)$", "VNEG(S|D)$")>;
|
| D | ARMScheduleA57.td | 723 def : InstRW<[A57Write_3cyc_1V], (instregex "VABS(S|D|H)")>;
1003 def : InstRW<[A57Write_3cyc_1V], (instregex "VABS", "VADDHN", "VHADD", "VHSUB",
1152 def : InstRW<[A57Write_3cyc_1V], (instregex "VABS(fd|fq|hd|hq)")>;
|
| D | ARMScheduleA9.td | 2439 // VABS
|
| D | ARMInstrNEON.td | 5827 // VABS : Vector Absolute Value
5828 defm VABS : N2VInt_QHS<0b11, 0b11, 0b01, 0b00110, 0,
|
| /external/arm-neon-tests/ |
| D | ref-rvct-neon-nofp16.txt | 2443 VABS/VABSQ output:
2444 VABS/VABSQ:0:result_int8x8 [] = { 10, f, e, d, c, b, a, 9, }
2445 VABS/VABSQ:1:result_int16x4 [] = { 10, f, e, d, }
2446 VABS/VABSQ:2:result_int32x2 [] = { 10, f, }
2447 VABS/VABSQ:3:result_int64x1 [] = { 3333333333333333, }
2448 VABS/VABSQ:4:result_uint8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
2449 VABS/VABSQ:5:result_uint16x4 [] = { 3333, 3333, 3333, 3333, }
2450 VABS/VABSQ:6:result_uint32x2 [] = { 33333333, 33333333, }
2451 VABS/VABSQ:7:result_uint64x1 [] = { 3333333333333333, }
2452 VABS/VABSQ:8:result_poly8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
[all …]
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| D | ref-rvct-neon.txt | 2825 VABS/VABSQ output:
2826 VABS/VABSQ:0:result_int8x8 [] = { 10, f, e, d, c, b, a, 9, }
2827 VABS/VABSQ:1:result_int16x4 [] = { 10, f, e, d, }
2828 VABS/VABSQ:2:result_int32x2 [] = { 10, f, }
2829 VABS/VABSQ:3:result_int64x1 [] = { 3333333333333333, }
2830 VABS/VABSQ:4:result_uint8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
2831 VABS/VABSQ:5:result_uint16x4 [] = { 3333, 3333, 3333, 3333, }
2832 VABS/VABSQ:6:result_uint32x2 [] = { 33333333, 33333333, }
2833 VABS/VABSQ:7:result_uint64x1 [] = { 3333333333333333, }
2834 VABS/VABSQ:8:result_poly8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
[all …]
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| D | ref-rvct-all.txt | 2825 VABS/VABSQ output:
2826 VABS/VABSQ:0:result_int8x8 [] = { 10, f, e, d, c, b, a, 9, }
2827 VABS/VABSQ:1:result_int16x4 [] = { 10, f, e, d, }
2828 VABS/VABSQ:2:result_int32x2 [] = { 10, f, }
2829 VABS/VABSQ:3:result_int64x1 [] = { 3333333333333333, }
2830 VABS/VABSQ:4:result_uint8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
2831 VABS/VABSQ:5:result_uint16x4 [] = { 3333, 3333, 3333, 3333, }
2832 VABS/VABSQ:6:result_uint32x2 [] = { 33333333, 33333333, }
2833 VABS/VABSQ:7:result_uint64x1 [] = { 3333333333333333, }
2834 VABS/VABSQ:8:result_poly8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
[all …]
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| D | expected_input4gcc-nofp16.txt | 2518 VABS/VABSQ output:
|
| D | expected_input4gcc.txt | 2684 VABS/VABSQ output:
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMScheduleSwift.td | 556 "VQRSHL", "VRSHR(u|s)", "VABS(f|v)", "VQABS", "VQNEG", "VQADD",
587 def : InstRW<[SwiftWriteP0TwoCycle], (instregex "VABS(S|D)$", "VNEG(S|D)$")>;
|
| D | ARMScheduleA9.td | 2415 // VABS
|
| D | ARMInstrNEON.td | 5551 // VABS : Vector Absolute Value
5552 defm VABS : N2VInt_QHS<0b11, 0b11, 0b01, 0b00110, 0,
|
| /external/v8/src/arm/ |
| D | assembler-arm.cc | 4101 enum UnaryOp { VMVN, VSWP, VABS, VABSF, VNEG, VNEGF }; enumerator
4115 case VABS: in EncodeNeonUnaryOp()
4175 emit(EncodeNeonUnaryOp(VABS, NEON_Q, size, dst.code(), src.code())); in vabs()
|
| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 789 def VABS : SInst<"vabs", "dd", "csifQcQsQiQf">;
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 4221 // VABS : Vector Absolute Value
4222 defm VABS : N2VInt_QHS<0b11, 0b11, 0b01, 0b00110, 0,
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmWriter.inc | 7731 // FCONSTD, FCONSTH, FCONSTS, VABDfd, VABDfq, VABDhd, VABDhq, VABSD, VABS...
|