Searched refs:VBIT (Results 1 – 10 of 10) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMScheduleR52.td | 791 def : InstRW<[R52WriteFPALU_F3, R52Read_F1, R52Read_F2, R52Read_F2], (instregex "(VBIF|VBIT|VBSL)d"…
792 def : InstRW<[R52Write2FPALU_F3, R52Read_F1, R52Read_F2, R52Read_F2], (instregex "(VBIF|VBIT|VBSL)q…
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| D | ARMScheduleSwift.td | 563 "VBIT", "VBSL", "VSLI", "VSRI", "VCLS", "VCLZ", "VCNT")>;
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| D | ARMScheduleA57.td | 1201 def : InstRW<[A57Write_3cyc_1V], (instregex "VBIF", "VBIT", "VBSL")>;
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| D | ARMScheduleA9.td | 2426 // VADD/VAND/VORR/VEOR/VBIC/VORN/VBIT/VBIF/VBSL
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| D | ARMInstrNEON.td | 5372 // VBIT : Vector Bitwise Insert if True
5386 // VBIT/VBIF are not yet implemented. The TwoAddress pass will not go looking
8474 // VBIF, VBIT, and VBSL allow, but do not require, a type suffix.
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| /external/llvm/lib/Target/ARM/ |
| D | ARMScheduleSwift.td | 546 "VBIT", "VBSL", "VSLI", "VSRI", "VCLS", "VCLZ", "VCNT")>;
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| D | ARMScheduleA9.td | 2402 // VADD/VAND/VORR/VEOR/VBIC/VORN/VBIT/VBIF/VBSL
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| D | ARMInstrNEON.td | 5098 // VBIT : Vector Bitwise Insert if True
5112 // VBIT/VBIF are not yet implemented. The TwoAddress pass will not go looking
8110 // VBIF, VBIT, and VBSL allow, but do not require, a type suffix.
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| /external/v8/src/arm/ |
| D | assembler-arm.cc | 4192 enum BinaryBitwiseOp { VAND, VBIC, VBIF, VBIT, VBSL, VEOR, VORR, VORN }; enumerator
4205 case VBIT: in EncodeNeonBinaryBitwiseOp()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 3922 // VBIT : Vector Bitwise Insert if True
3936 // VBIT/VBIF are not yet implemented. The TwoAddress pass will not go looking
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