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Searched refs:VEX_WIG (Results 1 – 6 of 6) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DX86DisassemblerTables.cpp78 bool VEX_LIG = false, bool VEX_WIG = false, in inheritsFrom() argument
146 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W)) || in inheritsFrom()
147 (VEX_WIG && inheritsFrom(child, IC_VEX_W)) || in inheritsFrom()
150 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS)) || in inheritsFrom()
151 (VEX_WIG && inheritsFrom(child, IC_VEX_W_XS)) || in inheritsFrom()
154 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD)) || in inheritsFrom()
155 (VEX_WIG && inheritsFrom(child, IC_VEX_W_XD)) || in inheritsFrom()
158 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) || in inheritsFrom()
159 (VEX_WIG && inheritsFrom(child, IC_VEX_W_OPSIZE)) || in inheritsFrom()
170 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W); in inheritsFrom()
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DX86RecognizableInstr.h145 VEX_W0 = 0, VEX_W1 = 1, VEX_WIG = 2, VEX_W1X = 3 enumerator
DX86RecognizableInstr.cpp784 VEX_WPrefix == X86Local::VEX_WIG, AddressSize); in emitDecodePath()
788 VEX_WPrefix == X86Local::VEX_WIG, AddressSize); in emitDecodePath()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrSSE.td200 VEX_4V, VEX_LIG, VEX_WIG;
205 VEX, VEX_LIG, Sched<[WriteFStore]>, VEX_WIG;
232 VEX, VEX_LIG, Sched<[WriteFLoad]>, VEX_WIG;
387 PS, VEX, VEX_WIG;
390 PD, VEX, VEX_WIG;
393 PS, VEX, VEX_WIG;
396 PD, VEX, VEX_WIG;
400 PS, VEX, VEX_L, VEX_WIG;
403 PD, VEX, VEX_L, VEX_WIG;
406 PS, VEX, VEX_L, VEX_WIG;
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DX86InstrAVX512.td1107 EVEX, VEX_WIG, Sched<[WriteVecExtract]>;
1114 EVEX, VEX_WIG, EVEX_CD8<32, CD8VT1>, Sched<[WriteVecExtractSt]>;
2244 EVEX_CD8<8, CD8VF>, VEX_WIG;
2248 EVEX_CD8<16, CD8VF>, VEX_WIG;
2260 EVEX_CD8<8, CD8VF>, VEX_WIG;
2264 EVEX_CD8<16, CD8VF>, VEX_WIG;
4717 VEX_WIG;
4725 VEX_WIG;
4910 SchedWriteShuffle.ZMM>, EVEX_V512, VEX_WIG;
4914 EVEX_V256, VEX_WIG;
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DX86InstrFormats.td210 class VEX_WIG { bits<2> VEX_WPrefix = 2; }
212 // FIXME: We should consider adding separate bits for VEX_WIG and the extra