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Searched refs:VLD (Results 1 – 23 of 23) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64Schedule.td97 // Read the unwritten lanes of the VLD's destination registers.
/external/llvm/lib/Target/AArch64/
DAArch64Schedule.td97 // Read the unwritten lanes of the VLD's destination registers.
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelLowering.cpp7290 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP() local
7291 if (VLD->getOpcode() != ISD::INTRINSIC_W_CHAIN) in CombineVLDDUP()
7295 unsigned IntNo = cast<ConstantSDNode>(VLD->getOperand(1))->getZExtValue(); in CombineVLDDUP()
7312 cast<ConstantSDNode>(VLD->getOperand(NumVecs+3))->getZExtValue(); in CombineVLDDUP()
7313 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()
7331 SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) }; in CombineVLDDUP()
7332 MemIntrinsicSDNode *VLDMemInt = cast<MemIntrinsicSDNode>(VLD); in CombineVLDDUP()
7333 SDValue VLDDup = DAG.getMemIntrinsicNode(NewOpc, VLD->getDebugLoc(), SDTys, in CombineVLDDUP()
7338 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()
7354 DCI.CombineTo(VLD, VLDDupResults); in CombineVLDDUP()
DARMInstrNEON.td192 // Classes for VLD* pseudo-instructions with multi-register operands.
541 // Classes for VLD*LN pseudo-instructions with multi-register operands.
DARMInstrInfo.td795 // Special version of addrmode6 to handle alignment encoding for VLD-dup
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMInstrInfo.td1154 // VLD/VST instructions and checking the alignment is not specified.
1165 // VLD/VST instructions and checking the alignment value.
1176 // VLD/VST instructions and checking the alignment value.
1187 // VLD/VST instructions and checking the alignment value.
1198 // for VLD/VST instructions and checking the alignment value.
1209 // encoding for VLD/VST instructions and checking the alignment value.
1219 // Special version of addrmode6 to handle alignment encoding for VLD-dup
1240 // VLD-dup instruction and checking the alignment is not specified.
1250 // Special version of addrmode6 to handle 16-bit alignment encoding for VLD-dup
1261 // Special version of addrmode6 to handle 32-bit alignment encoding for VLD-dup
[all …]
DARMISelLowering.cpp11753 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP() local
11754 if (VLD->getOpcode() != ISD::INTRINSIC_W_CHAIN) in CombineVLDDUP()
11758 unsigned IntNo = cast<ConstantSDNode>(VLD->getOperand(1))->getZExtValue(); in CombineVLDDUP()
11775 cast<ConstantSDNode>(VLD->getOperand(NumVecs+3))->getZExtValue(); in CombineVLDDUP()
11776 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()
11794 SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) }; in CombineVLDDUP()
11795 MemIntrinsicSDNode *VLDMemInt = cast<MemIntrinsicSDNode>(VLD); in CombineVLDDUP()
11796 SDValue VLDDup = DAG.getMemIntrinsicNode(NewOpc, SDLoc(VLD), SDTys, in CombineVLDDUP()
11801 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()
11817 DCI.CombineTo(VLD, VLDDupResults); in CombineVLDDUP()
DARMScheduleA57.td155 "VLD(1|2)LN(d|q)(WB_fixed_|WB_register_)?Asm",
156 "VLD(3|4)(DUP|LN)?(d|q)(WB_fixed_|WB_register_)?Asm",
DARMInstrNEON.td620 // Classes for VLD* pseudo-instructions with multi-register operands.
1046 // Classes for VLD*LN pseudo-instructions with multi-register operands.
/external/llvm/lib/Target/ARM/
DARMInstrInfo.td1050 // VLD/VST instructions and checking the alignment is not specified.
1061 // VLD/VST instructions and checking the alignment value.
1072 // VLD/VST instructions and checking the alignment value.
1083 // VLD/VST instructions and checking the alignment value.
1094 // for VLD/VST instructions and checking the alignment value.
1105 // encoding for VLD/VST instructions and checking the alignment value.
1115 // Special version of addrmode6 to handle alignment encoding for VLD-dup
1136 // VLD-dup instruction and checking the alignment is not specified.
1146 // Special version of addrmode6 to handle 16-bit alignment encoding for VLD-dup
1157 // Special version of addrmode6 to handle 32-bit alignment encoding for VLD-dup
[all …]
DARMISelLowering.cpp10120 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP() local
10121 if (VLD->getOpcode() != ISD::INTRINSIC_W_CHAIN) in CombineVLDDUP()
10125 unsigned IntNo = cast<ConstantSDNode>(VLD->getOperand(1))->getZExtValue(); in CombineVLDDUP()
10142 cast<ConstantSDNode>(VLD->getOperand(NumVecs+3))->getZExtValue(); in CombineVLDDUP()
10143 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()
10161 SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) }; in CombineVLDDUP()
10162 MemIntrinsicSDNode *VLDMemInt = cast<MemIntrinsicSDNode>(VLD); in CombineVLDDUP()
10163 SDValue VLDDup = DAG.getMemIntrinsicNode(NewOpc, SDLoc(VLD), SDTys, in CombineVLDDUP()
10168 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()
10184 DCI.CombineTo(VLD, VLDDupResults); in CombineVLDDUP()
DARMInstrNEON.td622 // Classes for VLD* pseudo-instructions with multi-register operands.
1023 // Classes for VLD*LN pseudo-instructions with multi-register operands.
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenAsmWriter.inc7396 // VEXTq64, VLD1d64, VLD1d64Q, VLD1d64Qwb_fixed, VLD1d64Qwb_register, VLD...
7812 // VLD1DUPd16, VLD1DUPd16wb_fixed, VLD1DUPd16wb_register, VLD1DUPd32, VLD...
7817 // VLD1DUPq16, VLD1DUPq16wb_fixed, VLD1DUPq16wb_register, VLD1DUPq32, VLD...
8110 // VLD3DUPd16, VLD3DUPd16_UPD, VLD3DUPd32, VLD3DUPd32_UPD, VLD3DUPd8, VLD...
8341 // VLD3DUPd16, VLD3DUPd16_UPD, VLD3DUPd32, VLD3DUPd32_UPD, VLD3DUPd8, VLD...
8357 // VLD4DUPd16, VLD4DUPd16_UPD, VLD4DUPd32, VLD4DUPd32_UPD, VLD4DUPd8, VLD...
/external/capstone/arch/ARM/
DARMGenAsmWriter.inc6460 // VEXTq64, VLD1d64, VLD1d64Q, VLD1d64Qwb_fixed, VLD1d64Qwb_register, VLD...
6809 // VLD1DUPd16, VLD1DUPd16wb_fixed, VLD1DUPd16wb_register, VLD1DUPd32, VLD...
6814 // VLD1DUPq16, VLD1DUPq16wb_fixed, VLD1DUPq16wb_register, VLD1DUPq32, VLD...
7143 // VLD3DUPd16, VLD3DUPd16_UPD, VLD3DUPd32, VLD3DUPd32_UPD, VLD3DUPd8, VLD...
7370 // VLD3DUPd16, VLD3DUPd16_UPD, VLD3DUPd32, VLD3DUPd32_UPD, VLD3DUPd8, VLD...
7390 // VLD4DUPd16, VLD4DUPd16_UPD, VLD4DUPd32, VLD4DUPd32_UPD, VLD4DUPd8, VLD...
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86GenAsmWriter.inc6316 "ERTF128rr\000VINSERTPSrm\000VINSERTPSrr\000VLDDQUYrm\000VLDDQUrm\000VLD"
DX86GenAsmWriter1.inc7059 "ERTF128rr\000VINSERTPSrm\000VINSERTPSrr\000VLDDQUYrm\000VLDDQUrm\000VLD"
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
D2013-1_UNLOCODE_CodeListPart3.csv3771 ,"PT","VLD","Vila da Ponte","Vila da Ponte","18","--3-----","RL","0401",,"4055N 00730W",
5251 ,"RU","VLD","Volodarsk","Volodarsk","NIZ","--3-----","RQ","1001",,"5613N 04311E",
7157 "+","SE","VLD","Vallda","Vallda","N","--3-----","RL","1301",,"5728N 01200E",
7809 "+","SK","VLD","Vel'K� Ida","Vel'Ka Ida","KI","--3-----","RL","1301",,"4836N 02110E",
25809 ,"US","VLD","Valdosta","Valdosta","GA","--34----","AI","9601",,,
D2013-1_UNLOCODE_CodeListPart2.csv9404 ,"IN","VLD","Dishman-Pharmaceutical-SEZ/Kalyangadh","Dishman-Pharmaceutical-SEZ/Kalyangadh","GJ","-…
15485 ,"IT","VLD","Villa di Serio","Villa di Serio",,"--3-----","RQ","9704",,,
21959 ,"NL","VLD","Vlodrop","Vlodrop",,"--3-----","AF","9602",,,
D2013-1_UNLOCODE_CodeListPart1.csv732 ,"AR","VLD","Villa Dominico","Villa Dominico","B","-----6--","RL","1107",,"3441S 05819W",
26019 ,"DK","VLD","Vildbjerg","Vildbjerg","65","--3-----","RQ","0901",,,
27435 "X","EE","VLD","Veeleidi","Veeleidi",,"1-------","XX","1301",,"5934N 02539E",""
31181 ,"ES","VLD","Vilada","Vilada",,"--3-----","RL","0701",,"4208N 00156E",""
43292 ,"FR","VLD","Villaz","Villaz","74","--3-----","RL","0601",,"4557N 00611E",
/external/toolchain-utils/android_bench_suite/panorama_input/
Dtest_007.ppm9173 …f`Rd^PTQBa^O_[LYVF^ZKYVFQK=QK=^XJgaSYQCKC5WO>WO>bZLZRDTL>bZLqi[WOAQI;JB4OE=VLD^TMRIBPF?VLE[RJbYQXO…
Dtest_003.ppm3796 ���� !4,*=54OFETLKZRQski�}z���~tp1'#aWStif|qnxnk�}�}�zoundbYQQH?VLD<3*,#" …
Dtest_011.ppm1260 �� �� �5((! 70?6.VLD}sq�wvodg%��^ZY|xw"
Dtest_006.ppm5512 …ϻ�ϼ�;�м�м�о�н�Ͻ�Ͻ�Ͼ�Ͼ�������ؾ����������������������������җ��__TKI<DB5JE<JE<VLD`WOne]{qi�~w��z�uo~s…