| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | VirtRegMap.cpp | 51 char VirtRegMap::ID = 0;
53 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false)
55 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) { in runOnMachineFunction()
92 void VirtRegMap::grow() { in grow()
103 unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) { in createSpillSlot()
118 unsigned VirtRegMap::getRegAllocPref(unsigned virtReg) { in getRegAllocPref()
129 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { in assignVirt2StackSlot()
137 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { in assignVirt2StackSlot()
147 int VirtRegMap::assignVirtReMatId(unsigned virtReg) { in assignVirtReMatId()
155 void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) { in assignVirtReMatId()
[all …]
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| D | Spiller.cpp | 55 VirtRegMap *vrm;
63 SpillerBase(MachineFunctionPass &pass, MachineFunction &mf, VirtRegMap &vrm) in SpillerBase()
180 VirtRegMap &vrm) in TrivialSpiller()
200 VirtRegMap *vrm;
203 VirtRegMap &vrm) in StandardSpiller()
220 if (SS == VirtRegMap::NO_STACK_SLOT) in spill()
234 VirtRegMap &vrm) { in createSpiller()
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| D | Spiller.h | 18 class VirtRegMap; variable
36 VirtRegMap &vrm);
42 VirtRegMap &vrm);
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| D | VirtRegRewriter.cpp | 93 bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM, in runOnMachineFunction()
214 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) in addAvailable()
216 << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1); in addAvailable()
424 VirtRegMap &VRM);
442 VirtRegMap &VRM) { in GetRegForReload()
679 VirtRegMap &VRM) { in ReMaterialize()
759 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) in ClobberPhysRegOnly()
760 DEBUG(dbgs() << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 <<"\n"); in ClobberPhysRegOnly()
873 VirtRegMap &VRM) { in GetRegForReload()
932 bool DoReMat = NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT; in GetRegForReload()
[all …]
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| D | SplitKit.h | 35 class VirtRegMap; variable
44 const VirtRegMap &VRM;
119 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
206 VirtRegMap &VRM;
344 SplitEditor(SplitAnalysis &SA, LiveIntervals&, VirtRegMap&,
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| D | LiveRangeEdit.h | 31 class VirtRegMap; variable
129 LiveInterval &createFrom(unsigned OldReg, LiveIntervals&, VirtRegMap&);
133 LiveInterval &create(LiveIntervals &LIS, VirtRegMap &VRM) { in create()
195 LiveIntervals&, VirtRegMap&,
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| D | RegAllocBase.h | 48 class VirtRegMap; variable
93 VirtRegMap *VRM;
107 void init(VirtRegMap &vrm, LiveIntervals &lis);
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| D | VirtRegRewriter.h | 16 class VirtRegMap; variable
22 virtual bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM,
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| D | VirtRegMap.h | 40 class VirtRegMap : public MachineFunctionPass {
141 VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT
142 void operator=(const VirtRegMap&); // DO NOT IMPLEMENT
146 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG), in VirtRegMap() function
522 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
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| D | LiveDebugVariables.h | 30 class VirtRegMap; variable
55 void emitDebugValues(VirtRegMap *VRM);
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| D | AllocationOrder.h | 23 class VirtRegMap; variable
40 const VirtRegMap &VRM,
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| /external/llvm/lib/CodeGen/ |
| D | VirtRegMap.cpp | 50 char VirtRegMap::ID = 0;
52 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false)
54 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) { in runOnMachineFunction()
68 void VirtRegMap::grow() { in grow()
75 unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) { in createSpillSlot()
82 bool VirtRegMap::hasPreferredPhys(unsigned VirtReg) { in hasPreferredPhys()
91 bool VirtRegMap::hasKnownPreference(unsigned VirtReg) { in hasKnownPreference()
100 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { in assignVirt2StackSlot()
108 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { in assignVirt2StackSlot()
118 void VirtRegMap::print(raw_ostream &OS, const Module*) const { in print()
[all …]
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| D | RegAllocBase.h | 47 class VirtRegMap; variable
63 VirtRegMap *VRM;
80 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
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| D | SplitKit.h | 37 class VirtRegMap; variable
80 const VirtRegMap &VRM;
150 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
240 VirtRegMap &VRM;
385 VirtRegMap&, MachineDominatorTree&,
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| D | Spiller.h | 18 class VirtRegMap; variable
39 VirtRegMap &vrm);
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | VirtRegMap.cpp | 59 char VirtRegMap::ID = 0;
61 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false)
63 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) { in runOnMachineFunction()
77 void VirtRegMap::grow() { in grow()
84 void VirtRegMap::assignVirt2Phys(unsigned virtReg, MCPhysReg physReg) { in assignVirt2Phys()
95 unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) { in createSpillSlot()
103 bool VirtRegMap::hasPreferredPhys(unsigned VirtReg) { in hasPreferredPhys()
112 bool VirtRegMap::hasKnownPreference(unsigned VirtReg) { in hasKnownPreference()
121 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { in assignVirt2StackSlot()
129 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { in assignVirt2StackSlot()
[all …]
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| D | RegAllocBase.h | 53 class VirtRegMap; variable
67 VirtRegMap *VRM = nullptr;
82 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
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| D | SplitKit.h | 45 class VirtRegMap; variable
86 const VirtRegMap &VRM;
156 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
245 VirtRegMap &VRM;
430 VirtRegMap &vrm, MachineDominatorTree &mdt,
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| D | Spiller.h | 18 class VirtRegMap; variable
40 VirtRegMap &vrm);
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| D | RegAllocPBQP.cpp | 167 void initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, Spiller &VRegSpiller);
171 MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM,
178 VirtRegMap &VRM,
184 VirtRegMap &VRM) const;
551 au.addRequired<VirtRegMap>(); in getAnalysisUsage()
552 au.addPreserved<VirtRegMap>(); in getAnalysisUsage()
578 void RegAllocPBQP::initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, in initializeGraph()
680 VirtRegMap &VRM, Spiller &VRegSpiller) { in spillVReg()
706 VirtRegMap &VRM, in mapPBQPToRegAlloc()
745 VirtRegMap &VRM) const { in finalizeAlloc()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | VirtRegMap.h | 34 class VirtRegMap : public MachineFunctionPass {
71 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG), in VirtRegMap() function
73 VirtRegMap(const VirtRegMap &) = delete;
74 VirtRegMap &operator=(const VirtRegMap &) = delete;
181 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
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| D | CalcSpillWeights.h | 23 class VirtRegMap; variable
54 VirtRegMap *VRM;
62 VirtRegMap *vrm, const MachineLoopInfo &loops,
100 VirtRegMap *VRM,
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| /external/llvm/include/llvm/CodeGen/ |
| D | VirtRegMap.h | 32 class VirtRegMap : public MachineFunctionPass {
66 VirtRegMap(const VirtRegMap&) = delete;
67 void operator=(const VirtRegMap&) = delete;
71 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG), in VirtRegMap() function
184 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
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| D | CalcSpillWeights.h | 23 class VirtRegMap; variable
55 VirtRegMap *VRM;
63 VirtRegMap *vrm, const MachineLoopInfo &loops,
75 VirtRegMap *VRM,
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | LiveIntervalAnalysis.h | 44 class VirtRegMap; variable
133 bool conflictsWithPhysReg(const LiveInterval &li, VirtRegMap &vrm,
280 const MachineLoopInfo *loopInfo, VirtRegMap& vrm);
286 unsigned PhysReg, VirtRegMap &vrm);
386 bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm,
425 void handleSpilledImpDefs(const LiveInterval &li, VirtRegMap &vrm,
432 MachineInstr *MI, unsigned NewVReg, VirtRegMap &vrm);
442 VirtRegMap &vrm, const TargetRegisterClass* rc,
451 VirtRegMap &vrm, const TargetRegisterClass* rc,
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