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Searched refs:WSP (Results 1 – 25 of 29) sorted by relevance

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/external/python/cpython3/Lib/email/
D_header_value_parser.py83 WSP = set(' \t') variable
84 CFWS_LEADER = WSP | set('(')
86 ATOM_ENDS = SPECIALS | WSP
91 TOKEN_ENDS = TSPECIALS | WSP
93 ATTRIBUTE_ENDS = ASPECIALS | WSP
949 _wsp_splitter = re.compile(r'([{}]+)'.format(''.join(WSP))).split
1043 if text[0] in WSP:
1079 if value[0] in WSP:
1174 if value[0] in WSP:
1204 if value[0] in WSP:
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td86 def WSP : AArch64Reg<31, "wsp">, DwarfRegNum<[31]>;
87 def WZR : AArch64Reg<31, "wzr">, DwarfRegAlias<WSP>;
121 def SP : AArch64Reg<31, "sp", [WSP]>, DwarfRegAlias<WSP>;
122 def XZR : AArch64Reg<31, "xzr", [WZR]>, DwarfRegAlias<WSP>;
139 // GPR register classes which exclude SP/WSP.
149 // GPR register classes which include SP/WSP.
150 def GPR32sp : RegisterClass<"AArch64", [i32], 32, (add GPR32common, WSP)> {
159 def GPR32sponly : RegisterClass<"AArch64", [i32], 32, (add WSP)>;
172 // GPR register classes which include WZR/XZR AND SP/WSP. This is not a
174 def GPR32all : RegisterClass<"AArch64", [i32], 32, (add GPR32common, WZR, WSP)>;
DAArch64RegisterInfo.cpp123 Reserved.set(AArch64::WSP); in getReservedRegs()
153 case AArch64::WSP: in isReservedReg()
DAArch64InstrInfo.cpp1904 if (DestReg == AArch64::WSP || SrcReg == AArch64::WSP) { in copyPhysReg()
2208 assert(SrcReg != AArch64::WSP); in storeRegToStackSlot()
2312 assert(DestReg != AArch64::WSP); in loadRegFromStackSlot()
DAArch64CallingConvention.td320 : CalleeSavedRegs<(add (sequence "W%u", 0, 30), WSP,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td92 def WSP : AArch64Reg<31, "wsp">, DwarfRegNum<[31]>;
93 def WZR : AArch64Reg<31, "wzr">, DwarfRegAlias<WSP>;
127 def SP : AArch64Reg<31, "sp", [WSP]>, DwarfRegAlias<WSP>;
128 def XZR : AArch64Reg<31, "xzr", [WZR]>, DwarfRegAlias<WSP>;
148 // GPR register classes which exclude SP/WSP.
158 // GPR register classes which include SP/WSP.
159 def GPR32sp : RegisterClass<"AArch64", [i32], 32, (add GPR32common, WSP)> {
168 def GPR32sponly : RegisterClass<"AArch64", [i32], 32, (add WSP)>;
191 // GPR register classes which include WZR/XZR AND SP/WSP. This is not a
193 def GPR32all : RegisterClass<"AArch64", [i32], 32, (add GPR32common, WZR, WSP)>;
DAArch64RegisterInfo.cpp144 markSuperRegs(Reserved, AArch64::WSP); in getReservedRegs()
172 case AArch64::WSP: in isReservedReg()
DAArch64FalkorHWPFFix.cpp647 if (BaseReg == AArch64::SP || BaseReg == AArch64::WSP) in getLoadInfo()
DAArch64InstrInfo.cpp757 return ((Reg == AArch64::WSP || Reg == AArch64::SP) && Imm == 0); in isExynosResetFast()
2458 if (DestReg == AArch64::WSP || SrcReg == AArch64::WSP) { in copyPhysReg()
2764 assert(SrcReg != AArch64::WSP); in storeRegToStackSlot()
2872 assert(DestReg != AArch64::WSP); in loadRegFromStackSlot()
DAArch64CallingConvention.td337 : CalleeSavedRegs<(add (sequence "W%u", 0, 30), WSP,
DAArch64FastISel.cpp1287 if (LHSReg == AArch64::SP || LHSReg == AArch64::WSP || in emitAddSub_rr()
1288 RHSReg == AArch64::SP || RHSReg == AArch64::WSP) in emitAddSub_rr()
1371 assert(LHSReg != AArch64::SP && LHSReg != AArch64::WSP && in emitAddSub_rs()
1372 RHSReg != AArch64::SP && RHSReg != AArch64::WSP); in emitAddSub_rs()
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h63 case AArch64::SP: return AArch64::WSP; in getWRegFromXReg()
103 case AArch64::WSP: return AArch64::SP; in getXRegFromWReg()
/external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/AArch64/
Dcoalescing.ll29 ; CHECK-NEXT: DW_OP_breg31 WSP+12
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h63 case AArch64::SP: return AArch64::WSP; in getWRegFromXReg()
103 case AArch64::WSP: return AArch64::SP; in getXRegFromWReg()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Darm64-aliases.s5 ; ADD #0 to/from SP/WSP is a MOV
/external/llvm/test/MC/AArch64/
Darm64-aliases.s5 ; ADD #0 to/from SP/WSP is a MOV
/external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/MIR/AArch64/
Dclobber-sp.mir8 # CHECK-NEXT: [0x0000000000000014, 0x0000000000000038): DW_OP_breg31 WSP+8
/external/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.cpp1109 ((Dest == AArch64::WSP || Src1 == AArch64::WSP) && in printArithExtend()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.cpp967 ((Dest == AArch64::WSP || Src1 == AArch64::WSP) && in printArithExtend()
/external/libcups/filter/
Dspec-ppd.shtml8 HEADER = "*PPD-Adobe:" *WSP DQUOTE VERSION DQUOTE LINE-END
14 DATA = "*" 1*KCHAR [ WSP 1*KCHAR [ "/" 1*TCHAR ] ] ":"
15 1*(*WSP VALUE) LINE-END
21 SCHAR = LINE-END / WSP / %x21.23-7E.A0-FF
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenRegisterInfo.inc26 WSP = 6,
2177 { AArch64::WSP },
2333 … AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WZR, AArch64::WSP,
2363 … AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WSP,
2393 AArch64::WSP,
3498 { 31U, AArch64::WSP },
3615 { 31U, AArch64::WSP },
3705 { AArch64::WSP, 31U },
3984 { AArch64::WSP, 31U },
6636 …h64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WSP, AArch64::W0, AArch…
[all …]
/external/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp430 Register = AArch64::WSP; in DecodeGPR32spRegisterClass()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp482 Register = AArch64::WSP; in DecodeGPR32spRegisterClass()
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
D2013-1_UNLOCODE_CodeListPart2.csv5270 ,"GB","WSP","Weston Point","Weston Point","CHS","123-----","AF","9811",,,
20235 ,"MY","WSP","Westport/Port Klang","Westport/Port Klang","10","--3-----","RQ","0507",,"0257N 10118E",
20586 ,"NI","WSP","Waspam","Waspam",,"---4----","AI","9601",,,
22018 ,"NL","WSP","Weesp","Weesp",,"--3-----","AF","9602",,,
/external/toolchain-utils/android_bench_suite/panorama_input/
Dtest_003.ppm5188   gd^WSP

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