| /external/clang/test/CodeGen/ |
| D | override-layout.c | 125 struct ALIGNED16 X16 { struct
161 struct X16 x16; in use_structs()
162 x16.x = sizeof(struct X16); in use_structs()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | armv8.4a-ldst.s | 41 LDAPURSB X0, [X16]
42 LDAPURSB X0, [X16, #-256]
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| D | armv8.4a-ldst-error.s | 23 LDAPURSB X0, [X16, #-257]
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| /external/libxaac/decoder/armv8/ |
| D | ixheaacd_apply_scale_factors.s | 7 stp X16, X17, [sp, #-16]!
16 ldp X16, X17, [sp], #16
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| D | ixheaacd_no_lap1.s | 31 stp X16, X17, [sp, #-16]!
36 ldp X16, X17, [sp], #16
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| D | ixheaacd_cos_sin_mod_loop2.s | 10 stp X16, X17, [sp, #-16]!
20 ldp X16, X17, [sp], #16
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| D | ixheaacd_cos_sin_mod_loop1.s | 10 stp X16, X17, [sp, #-16]!
20 ldp X16, X17, [sp], #16
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| D | ixheaacd_sbr_qmf_analysis32_neon.s | 10 stp X16, X17, [sp, #-16]!
15 ldp X16, X17, [sp], #16
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| D | ixheaacd_pre_twiddle.s | 31 stp X16, X17, [sp, #-16]!
36 ldp X16, X17, [sp], #16
48 MOV X16, \reg1
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| D | ixheaacd_overlap_add2.s | 31 stp X16, X17, [sp, #-16]!
36 ldp X16, X17, [sp], #16
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| D | ixheaacd_overlap_add1.s | 30 stp X16, X17, [sp, #-16]!
35 ldp X16, X17, [sp], #16
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| D | ixheaacd_fft32x32_ld2_armv8.s | 6 stp X16, X17, [sp, #-16]!
18 ldp X16, X17, [sp], #16
|
| /external/u-boot/arch/x86/include/asm/arch-quark/ |
| D | mrc.h | 32 X16, /* DRAM width & Channel Width */ enumerator
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCBaseInfo.h | 47 case R16: case X16: case F16: case V16: case CR4LT: return 16; in getPPCRegisterNumbering()
|
| /external/u-boot/arch/x86/cpu/quark/ |
| D | mrc_util.c | 1029 uint8_t bl_divisor = (mrc_params->channel_width == X16) ? 2 : 1; in sample_dqs()
1097 uint8_t bl_divisor = (mrc_params->channel_width == X16) ? 2 : 1; in find_rising_edge()
1271 if (mrc_params->channel_width == X16) in byte_lane_mask()
1448 uint8_t bl_divisor = (mrc_params->channel_width == X16) ? 2 : 1; in print_timings()
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| D | mrc.c | 143 mrc_params->channel_size[0] *= (channel_width == X16) ? 1 : 2; in mrc_adjust_params()
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| D | smc.c | 1014 (mrc_params->channel_width == X16)) ? in ddrphy_init()
1407 uint8_t bl_divisor = (mrc_params->channel_width == X16) ? 2 : 1; in rcvn_cal()
1554 uint8_t bl_divisor = (mrc_params->channel_width == X16) ? 2 : 1; in wr_level()
1789 uint8_t bl_divisor = (mrc_params->channel_width == X16) ? 2 : 1; in rd_train()
2087 uint8_t bl_divisor = (mrc_params->channel_width == X16) ? 2 : 1; in wr_train()
2408 if (mrc_params->dram_width == X16) { in prog_dra_drb()
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 48 case AArch64::X16: return AArch64::W16; in getWRegFromXReg()
88 case AArch64::W16: return AArch64::X16; in getXRegFromWReg()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 48 case AArch64::X16: return AArch64::W16; in getWRegFromXReg()
88 case AArch64::W16: return AArch64::X16; in getXRegFromWReg()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCFrameLowering.h | 267 {PPC::X16, -128}, in getCalleeSavedSpillSlots()
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| D | PPCRegisterInfo.cpp | 161 PPC::X16, PPC::X17, PPC::X18, PPC::X19, in getCalleeSavedRegs()
187 PPC::X16, PPC::X17, PPC::X18, PPC::X19, in getCalleeSavedRegs()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.td | 240 def CSR_Darwin64 : CalleeSavedRegs<(add X13, X14, X15, X16, X17, X18, X19, X20,
249 def CSR_SVR464 : CalleeSavedRegs<(add X14, X15, X16, X17, X18, X19, X20,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
| D | RISCVFrameLowering.cpp | 226 RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, in determineCalleeSaves()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/Disassembler/ |
| D | RISCVDisassembler.cpp | 63 RISCV::X16, RISCV::X17, RISCV::X18, RISCV::X19,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 201 PPC::X16, PPC::X17, PPC::X18, PPC::X19,
212 PPC::X16, PPC::X17, PPC::X18, PPC::X19,
|