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Searched refs:XCHAL_DCACHE_SIZE (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/xtensa/include/asm/
Dcacheasm.h15 #define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE/XCHAL_DCACHE_WAYS)
83 #if XCHAL_DCACHE_LINE_LOCKABLE && XCHAL_DCACHE_SIZE
84 __loop_cache_all \ar \at diu XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH
101 #if XCHAL_DCACHE_SIZE
102 __loop_cache_all \ar \at diwbi XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH
110 #if XCHAL_DCACHE_SIZE
111 __loop_cache_all \ar \at diwb XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH
119 #if XCHAL_DCACHE_SIZE
140 #if XCHAL_DCACHE_SIZE
149 #if XCHAL_DCACHE_SIZE
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/external/u-boot/arch/xtensa/include/asm/arch-dc232b/
Dcore.h125 #define XCHAL_DCACHE_SIZE 16384 /* D-cache size in bytes or 0 */ macro
/external/u-boot/arch/xtensa/include/asm/arch-dc233c/
Dcore.h144 #define XCHAL_DCACHE_SIZE 16384 /* D-cache size in bytes or 0 */ macro
/external/u-boot/arch/xtensa/include/asm/arch-de212/
Dcore.h192 #define XCHAL_DCACHE_SIZE 8192 /* D-cache size in bytes or 0 */ macro