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Searched refs:_f1 (Results 1 – 25 of 38) sorted by relevance

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/external/llvm/test/MC/MachO/
Dreloc.s49 .globl _f1 symbol
50 .weak_definition _f1
51 _f1: label
53 .long _f1
54 .long _f1 + 4
/external/swiftshader/third_party/LLVM/test/MC/MachO/
Dreloc.s49 .globl _f1 symbol
50 .weak_definition _f1
51 _f1: label
53 .long _f1
54 .long _f1 + 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/MachO/
Dreloc.s49 .globl _f1 symbol
50 .weak_definition _f1
51 _f1: label
53 .long _f1
54 .long _f1 + 4
/external/swiftshader/third_party/LLVM/test/MC/AsmParser/
Dassignment.s8 # CHECK: .globl _f1
9 # CHECK: _f1 = 0
10 .globl _f1 symbol
11 _f1 = 0 define
/external/llvm/test/MC/AsmParser/
Dassignment.s8 # CHECK: .globl _f1
9 # CHECK: _f1 = 0
10 .globl _f1 symbol
11 _f1 = 0 define
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Daligned-blx.s5 .thumb_func _f1
7 .globl _f1 symbol
8 _f1: label
30 blx _f1
36 @ CHECK: ff f7 f2 ef blx _f1
Dmisaligned-blx.s3 .thumb_func _f1
5 .globl _f1 symbol
6 _f1: label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AsmParser/
Dassignment.s13 # CHECK: .globl _f1
14 # CHECK: .set _f1, 0
15 .globl _f1 symbol
16 _f1 = 0 define
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
DFrames-large.ll16 ; PPC32-NOFP: _f1:
24 ; PPC32-FP: _f1:
35 ; PPC64-NOFP: _f1:
44 ; PPC64-FP: _f1:
/external/llvm/test/CodeGen/PowerPC/
DFrames-large.ll15 ; PPC32-NOFP: _f1:
24 ; PPC32-FP: _f1:
36 ; PPC64-NOFP: _f1:
45 ; PPC64-FP: _f1:
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
DFrames-large.ll12 ; PPC32-NOFP: _f1:
21 ; PPC32-FP: _f1:
33 ; PPC64-NOFP: _f1:
42 ; PPC64-FP: _f1:
/external/llvm/test/MC/ARM/
Daligned-blx.s5 .thumb_func _f1
7 .globl _f1 symbol
8 _f1: label
Dmisaligned-blx.s3 .thumb_func _f1
5 .globl _f1 symbol
6 _f1: label
/external/clang/test/CodeGenObjC/
D2011-03-08-IVarLookup.m8 UInt_t _f1; field
27 _f1 = 0;
/external/llvm/test/CodeGen/X86/
Ddllexport.ll20 ; CHECK: .globl _f1
86 ; CHECK: _alias2 = _f1
94 ; CHECK: _weak_alias = _f1
104 ; CHECK-CL: /EXPORT:_f1
Dcoff-comdat.ll58 ; CHECK: .section .text,"xr",discard,_f1
59 ; CHECK: .globl _f1
76 ; CHECK: .section .bss,"bw",associative,_f1
Dpatchable-prologue.ll17 ; CHECK-LABEL: _f1
21 ; CHECK-ALIGN: _f1:
/external/llvm/test/tools/lto/
Dopt-level.ll9 ; CHECK-O0: t _f1
10 ; CHECK-O2-NOT: _f1
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/lto/
Dopt-level.ll9 ; CHECK-O0: t _f1
10 ; CHECK-O2-NOT: _f1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Ddllexport.ll20 ; CHECK: .globl _f1
86 ; CHECK: .set _alias2, _f1
94 ; CHECK: .set _weak_alias, _f1
104 ; CHECK-CL: .ascii " /EXPORT:_f1"
Dcoff-comdat.ll58 ; CHECK: .section .text,"xr",discard,_f1
59 ; CHECK: .globl _f1
76 ; CHECK: .section .bss,"bw",associative,_f1
Dpatchable-prologue.ll17 ; CHECK-LABEL: _f1
21 ; CHECK-ALIGN: _f1:
/external/u-boot/drivers/pinctrl/mvebu/
Dpinctrl-armada-37xx.c130 #define PIN_GRP_GPIO_3(_name, _start, _nr, _mask, _v1, _v2, _v3, _f1, _f2) \ argument
137 .funcs = {_f1, _f2, "gpio"} \
141 _f1, _f2) \ argument
150 .funcs = {_f1, _f2} \
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/MachO/ARM/
Ddarwin-ARM-reloc.s10 _f1: label
121 @ CHECK: Name: _f1 (9)
/external/llvm/test/MC/MachO/ARM/
Ddarwin-ARM-reloc.s10 _f1: label
121 @ CHECK: Name: _f1 (9)

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